- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25516 > 954119DFLF-T (INTEGRATED DEVICE TECHNOLOGY INC) 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF資料下載
參數(shù)資料
| 型號(hào)： | 954119DFLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56 |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 245K |
| 代理商： | 954119DFLF-T |
9
Integrated
Circuit
Systems, Inc.
ICS954119
Advance Information
0875—05/24/04
I
2C Table: M/N Programming & WD Safe Frequency Control Register
Bit 7
M/N_EN
PLL1 M/N
Programming Enable
RW
0
Bit 6
Reserved
RW
0
Bit 5
WD Safe Freq Source
RW
0
Bit 4
WD SF4
RW
0
Bit 3
WD SF3
RW
0
Bit 2
WD SF2
RW
0
Bit 1
WD SF1
RW
0
Bit 0
WD SF0
RW
0
I
2C Table: PLL1 Frequency Control Register
Bit 7
N Div8
N Divider Prog bit 8
RW
X
Bit 6
N Div9
N Divider Prog bit 9
RW
X
Bit 5
M Div5
RW
X
Bit 4
M Div4
RW
X
Bit 3
M Div3
RW
X
Bit 2
M Div2
RW
X
Bit 1
M Div1
RW
X
Bit 0
M Div0
RW
X
I
2C Table: PLL1 Frequency Control Register
Bit 7
N Div7
RW
X
Bit 6
N Div6
RW
X
Bit 5
N Div5
RW
X
Bit 4
N Div4
RW
X
Bit 3
N Div3
RW
X
Bit 2
N Div2
RW
X
Bit 1
N Div1
RW
X
Bit 0
N Div0
RW
X
I
2C Table: PLL1 Spread Spectrum Control Register
Bit 7
SSP7
RW
X
Bit 6
SSP6
RW
X
Bit 5
SSP5
RW
X
Bit 4
SSP4
RW
X
Bit 3
SSP3
RW
X
Bit 2
SSP2
RW
X
Bit 1
SSP1
RW
X
Bit 0
SSP0
RW
X
I
2C Table: PLL1 Spread Spectrum Control Register
Bit 7
Reserved
R
0
Bit 6
SSP14
RW
X
Bit 5
SSP13
RW
X
Bit 4
SSP12
RW
X
Bit 3
SSP11
RW
X
Bit 2
SSP10
RW
X
Bit 1
SSP9
RW
X
Bit 0
SSP8
RW
X
-
--
-
Spread Spectrum
Programming bit(14:8)
These Spread Spectrum bits in Byte 13 and 14 will program the
spread pecentage of PLL1
-
Type
0
1
PWD
Byte 14
Pin #
Name
Control Function
-
Spread Spectrum
Programming bit(7:0)
These Spread Spectrum bits in Byte 13 and 14 will program the
spread pecentage of PLL1
-
Type
0
1
PWD
Byte 13
Pin #
Name
Control Function
-
N Divider Programming
Byte12 bit(7:0) and
Byte11 bit(7:6)
The decimal representation of M and N Divier in Byte 11 and 12
will configure the PLL1 VCO frequency. Default at power up =
latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
-
Type
0
1
PWD
Byte 12
Pin #
Name
Control Function
-
The decimal representation of M and N Divier in Byte 11 and 12
will configure the PLL1 VCO frequency. Default at power up =
latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
-
M Divider Programming
bit (5:0)
-
Type
0
1
PWD
Byte 11
Pin #
Name
Control Function
-
B10b(4:0)
Latch Inputs
-
Watch Dog Safe Freq
Programming bits
Writing to these bit will configure the safe frequency as Byte0 bit
(4:0).
-
Disable
Enable
-
--
Type
0
1
PWD
Byte 10
Pin #
Name
Control Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 954119DFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 954201BG | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 954201BGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 954201BF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 954201BGT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9541200000 | 制造商:Weidmuller 功能描述:NEXT 91/61/20 OGP ST, PAINT -EA - Bulk 制造商:Weidmuller 功能描述:NEXT 91/61/20 OGP ST PAINT |
| 9541205000 | 制造商:Amphenol Corporation 功能描述:SC/PC POL/CER BACKSHELL |
| 954-120-5000 | 制造商:Amphenol Corporation 功能描述:SC TO SC ZIRCONIA SLEEVE, S/M, BLUE - Bulk 制造商:Amphenol Corporation 功能描述:FIBRE OPTIC CONNECTOR BODY MATERIAL:ZIRC 制造商:Amphenol Fiber Optic Products 功能描述:SC FIBER OPTIC ADAPTER, SINGLE MODE; Connector Type:SC Adapter; Series:954; Fiber Type:Singlemode; Fiber Diameter:-; Connector Body Material:Ceramic; Body Material:Zirconia Ceramic; Connector Type:SC Fiber-Optic ;RoHS Compliant: Yes |
| 954-120-5001 | 制造商:Amphenol Corporation 功能描述:FIBER OPTICS - Bulk 制造商:Amphenol Corporation 功能描述:FIBRE OPTIC CONNECTOR BODY MATERIAL:PHOS |
| 954-120-5109 | 制造商:Amphenol Corporation 功能描述:FIBER OPTICS - Bulk 制造商:Amphenol RF 功能描述:Conn SC Adapter Single Mode F/F ST Panel Mount |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。