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參數(shù)資料
| 型號： | 954206BGT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, MO-153N, TSSOP-56 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 315K |
| 代理商： | 954206BGT |
13
Integrated
Circuit
Systems, Inc.
ICS954206B
Advance Information
0940—06/23/05
I
2C Table:Output Control Register
Control
Function
Bit 7
REF_1 Enable
Output Enable
RW
1
Bit 6
96MHz
Driven in PD
RW
1
Bit 5
REF_0 STRENGTH
Strength Programming
RW
1
Bit 4
PCI_F1
RW
1
Bit 3
PCI_F0
RW
1
Bit 2
CPUCLK2_ITP
RW
1
Bit 1
CPUCLK1
RW
1
Bit 0
CPUCLK0
RW
1
I
2C Table:Output Control Register
Control
Function
Bit 7
PCI_STOP Drive Mode
Driven in PCI_STOP#
RW
0
Bit 6
CPUCLK2_ITP_STOP Drive
Mode
RW
0
Bit 5
CPUCLK1_STOP Drive
Mode
RW
0
Bit 4
CPUCLK0_STOP Drive
Mode
RW
0
Bit 3
PCIEX (6:0) Drive Mode
RW
0
Bit 2
CPUCLK2_ITP_PD Drive
Mode
RW
0
Bit 1
CPUCLK[1:0] PD Drive
Mode
RW
0
Bit 0
ITP_EN
PCIEX/CPU_ITP select
RW
latch
I
2C Table: Output Control Register
Control
Function
Bit 7
SS4
LCDCLK Spread Prog Bit
4
RW
0
Bit 6
SS3
LCDCLK Spread Prog Bit
3
RW
1
Bit 5
SS2
LCDCLK Spread Prog Bit
2
RW
0
Bit 4
SS1
LCDCLK Spread Prog Bit
1
RW
0
Bit 3
SS0
LCDCLK Spread Prog Bit
0
RW
0
Bit 2
FSLC
Freq Select Bit 2
RW
Latched
Bit 1
FSLB
Freq Select Bit 1
RW
Latched
Bit 0
FSLA
Freq Select Bit 0
RW
Latched
I
2C Table: Vendor & Revision ID Register
Control
Function
Bit 7
RID3
R
x
Bit 6
RID2
R
x
Bit 5
RID1
R
x
Bit 4
RID0
R
x
Bit 3
VID3
R
0
Bit 2
VID2
R
0
Bit 1
VID1
R
0
Bit 0
VID0
R
1
-
--
-
VENDOR ID
--
-
--
-
--
-
--
-
--
1PWD
-
REVISION ID
--
-
--
Stoppable
Free Running
Byte 7
Pin #
Name
Type
0
-
Pin #
Name
-
Driven
Hi-Z
Driven
2X
1
Hi-Z
Stoppable
-
Pin #
Driven in Pow erdow n
(PD)
Allow assertion of
CPU_STOP# to stop
CPUCLK outputs
-
Name
-
Driven in CPU_STOP#
Allow assertion of
PCI_STOP# or setting of
See Table 1: PLL1 Frequency Selection
Table
Free Running
Hi-Z
0
Driven
See Table 2: LCDCLK Freq Sel
Type
Free Running
Hi-Z
Disable
Driven
1
96Mhz
100Mhz
Driven
Free Running
Driven
PCIEX
Enable
Stoppable
Hi-Z
PWD
Hi-Z
1
Hi-Z
CPU_ITP
Type
PWD
Type
0
Free Running
0
1X
PWD
-
Byte 5
-
Byte 4
-
Byte 6
Pin #
Name
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