參數(shù)資料
型號: 9FG1901HKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 7/18頁
文件大?。?/td> 245K
代理商: 9FG1901HKLFT
IDTTM
Frequency Gearing Clock for CPU, PCIe Gen1 & FBD
1386A - 02/02/10
9FG1901H
Frequency Gearing Clock for CPU, PCIe Gen1 & FBD
15
SRC Reference Clock
Common Recommendations for Differential Routing
Dimension or Value
Unit
Figure
L1 length, Route as non-coupled 50 ohm trace.
0.5 max
inch
1
L2 length, Route as non-coupled 50 ohm trace.
0.2 max
inch
1
L3 length, Route as non-coupled 50 ohm trace.
0.2 max
inch
1
Rs
33
ohm
1
Rt
49.9
ohm
1
Down Device Differential Routing
Dimension or Value
Unit
Figure
L4 length, Route as coupled microstrip 100 ohm differential trace.
2 min to 16 max
inch
1
L4 length, Route as coupled stripline 100 ohm differential trace.
1.8 min to 14.4 max
inch
1
Differential Routing to PCI Express Connector
Dimension or Value
Unit
Figure
L4 length, Route as coupled microstrip 100 ohm differential trace.
0.25 to 14 max
inch
2
L4 length, Route as coupled stripline 100 ohm differential trace.
0.225 min to 12.6 max
inch
2
Figure 1 Down device routing.
Rs
Rt
HSCL Output
Buffer
PCI Ex Board
Down Device
REF_CLK Input
L1
L2
L3’
L4
L1’
L2’
L3
L4’
Figure 1
Figure 2 PCI Express Connector Routing.
Rs
Rt
HSCL Output
Buffer
PCI Ex
Add In Board
REF_CLK Input
L1
L2
L3’
L4
L1’
L2’
L3
L4’
Figure 2
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