參數(shù)資料
型號: 9S12DJ64-ZIP_PART2
英文描述: MC9S12DJ64 Users Guides. zip format. part 2
中文描述: MC9S12DJ64用戶指南。 zip格式。第2部分
文件頁數(shù): 64/126頁
文件大小: 1809K
代理商: 9S12DJ64-ZIP_PART2
MC9S12DJ64 Device User Guide — V01.17
64
2.4.5 VRH, VRL — ATD Reference Voltage Input Pins
VRH and VRL are the reference voltage input pins for the analog to digital converter.
2.4.6 VDDPLL, VSSPLL — Power Supply Pins for PLL
Provides operating voltage and ground for the Oscillator and the Phased-Locked Loop. This allows the
supply voltage to the Oscillator and PLL to be bypassed independently.This 2.5V voltage is generated by
the internal voltage regulator.
NOTE:
No load allowed except for bypass capacitors.
2.4.7 VREGEN — On Chip Voltage Regulator Enable
Enables the internal 5V to 2.5V voltage regulator. If this pin is tied low, VDD1,2 and VDDPLL must be
supplied externally.
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