參數(shù)資料
型號: 9S12DJ64-ZIP_PART2
英文描述: MC9S12DJ64 Users Guides. zip format. part 2
中文描述: MC9S12DJ64用戶指南。 zip格式。第2部分
文件頁數(shù): 75/126頁
文件大?。?/td> 1809K
代理商: 9S12DJ64-ZIP_PART2
MC9S12DJ64 Device User Guide — V01.17
75
Section 6 HCS12 Core Block Description
6.1 CPU12 Block Description
Consult the CPU12 Reference Manual for information on the CPU.
6.1.1 Device-specific information
When the CPU12 Reference Manual refers to
cycles
this is equivalent to
Bus Clock periods
.
So
1 cycle
is equivalent to
1 Bus Clock period
.
6.2 HCS12 Module Mapping Control (MMC) Block Description
Consult the MMC Block Guide for information on the HCS12 Module Mapping Control module.
6.2.1 Device-specific information
INITEE
Reset state: $01
Bits EE11-EE15 are "Write once in Normal and Emulation modes and write anytime in Special
modes".
PPAGE
Reset state: $00
Register is "Write anytime in all modes"
MEMSIZ0
Reset state: $11
MEMSIZ1
Reset state: $80
6.3 HCS12 Multiplexed External Bus Interface (MEBI) Block
Description
Consult the MEBI Block Guide for information on HCS12 Multiplexed External Bus Interface module.
6.3.1 Device-specific information
PUCR
Reset state: $90
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