- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360656 > 9S12DP512DGV1 9S12Dx512 Device Guide PDF資料下載
參數(shù)資料
| 型號(hào)： | 9S12DP512DGV1 |
| 英文描述： | 9S12Dx512 Device Guide |
| 中文描述： | 9S12Dx512設(shè)備指南 |
| 文件頁數(shù)： | 55/126頁 |
| 文件大小： | 1809K |
| 代理商： | 9S12DP512DGV1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁當(dāng)前第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁
MC9S12DJ64 Device User Guide — V01.17
55
instruction queue. It is used as a MCU operating mode select pin during reset. The state of this pin is
latched to the MODC bit at the rising edge of RESET. This pin has a permanently enabled pull-up device.
2.3.7 PAD15 / AN15 / ETRIG1 — Port AD Input Pin of ATD1
PAD15 is a general purpose input pin and analog input AN7 of the analog to digital converter ATD1. It
can act as an external trigger input for the ATD1.
2.3.8 PAD[14:08] / AN[14:08] — Port AD Input Pins ATD1
PAD14 - PAD08 are general purpose input pins and analog inputs AN[6:0] of the analog to digital
converter ATD1.
2.3.9 PAD07 / AN07 / ETRIG0 — Port AD Input Pin of ATD0
PAD07 is a general purpose input pin and analog input AN0 of the analog to digital converter ATD0. It
can act as an external trigger input for the ATD0.
2.3.10 PAD[06:00] / AN[06:00] — Port AD Input Pins of ATD0
PAD06 - PAD00 are general purpose input pins and analog inputs AN[6:0] of the analog to digital
converter ATD0.
2.3.11 PA[7:0] / ADDR[15:8] / DATA[15:8] — Port A I/O Pins
PA7-PA0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus.
2.3.12 PB[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins
PB7-PB0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus.
2.3.13 PE7 / NOACC / XCLKS — Port E I/O Pin 7
PE7 is a general purpose input or output pin. During MCU expanded modes of operation, the NOACC
signal, when enabled, is used to indicate that the current bus cycle is an unused or “free” cycle. This signal
will assert when the CPU is not using the bus.
The XCLKS is an input signal which controls whether a crystal in combination with the internal Colpitts
(lowpower)oscillatorisusedorwhetherPierceoscillator/externalclockcircuitryisused.Thestateofthis
pin is latched at the rising edge of RESET. If the input is a logic low the EXTAL pin is configured for an
external clock drive or a Pierce Oscillator. If input is a logic high a Colpitts oscillator circuit is configured
on EXTAL and XTAL. Since this pin is an input with a pull-up device during reset, if the pin is left
floating, the default configuration is a Colpitts oscillator circuit on EXTAL and XTAL.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9S12DT128BDGV1 | 9S12DT128B Device Guide |
| 9S12DT128DGV2 | MC9S12DT128 Device User Guide V02.09 |
| 9S12DT128DGV2D | MC9S12DT128 Device User Guide V02.09 |
| 9S12DT256DGV3 | MC9S12DT256 Device User Guide V03.03 |
| 9S12E128DGV1 | MC9S12E-Family Device User Guide V01.04 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9S12DT128BDGV1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DT128B Device Guide |
| 9S12DT128DGV2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT128 Device User Guide V02.09 |
| 9S12DT128DGV2D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT128 Device User Guide V02.09 |
| 9S12DT256DGV3 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT256 Device User Guide V03.03 |
| 9S12E128DGV1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12E-Family Device User Guide V01.04 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。