參數(shù)資料
型號: A1280A-1PL84I
廠商: Microsemi SoC
文件頁數(shù): 7/54頁
文件大小: 0K
描述: IC FPGA 8K GATES 84-PLCC IND
標(biāo)準(zhǔn)包裝: 16
系列: ACT™ 2
LAB/CLB數(shù): 1232
輸入/輸出數(shù): 72
門數(shù): 8000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 84-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 84-PLCC(29.31x29.31)
ACT 2 Family FPGAs
R e visio n 8
2 -9
Sequential Module Timing Characteristics
Figure 2-5
Module Delays
S
A
B
Y
S, A or B
Y
GND
VCC
50%
tPLH
Y
GND
VCC
50%
VCC
50%
tPHL
tPLH
Note:
D represents all data functions involving A, B, and S for multiplexed flip-flops.
Figure 2-6
Flip-Flops and Latches
(Positive edge triggered)
E
D
CLK
CLR
Y
D*
G, CLK
Q
E
PRE, CLR
tWCLKA
tWASYN
tHD
tSUD
tA
tWCLKI
tSUENA
tCO
tRS
tHENA
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