參數(shù)資料
型號(hào)： A1361LKTTN-T
元件分類： 磁阻傳感器
英文描述： MAGNETIC FIELD SENSOR-HALL EFFECT, 4.65-4.80V, RECTANGULAR, THROUGH HOLE MOUNT
封裝： LEAD FREE, PLASTIC, SIP-4
文件頁(yè)數(shù)： 2/25頁(yè)
文件大小： 615K
代理商： A1361LKTTN-T
A1360, A1361,
and A1362
Delay to Clamp
A large magnetic input step may cause the clamp
to overshoot its steady state value. The Delay to Clamp, tCLP, is
defined as: the time it takes for the output voltage to settle within
±1% of its steady state value, after initially passing through its
steady state voltage, as shown in the following chart.
V
t
Magnetic Input
VOUT
0
t1= time at which output voltage initially
reaches steady state clamp voltage
t2= time at which output voltage settles to
within 1% of steady state clamp voltage
Note: Times apply to both high clamp
(shown) and low clamp.
VCLP(HIGH)
t1
t2
tCLP
Quiescent Voltage Output
In the quiescent state (no significant
magnetic field: B = 0 G), the output, VOUT(Q), has a constant ratio
to the supply voltage, VCC, throughout the entire operating ranges
of VCC and ambient temperature, TA.
Guaranteed Quiescent Voltage Output Range
The quiescent
voltage output, VOUT(Q), can be programmed around its nominal
value of 2.5 V, within the guaranteed quiescent voltage range
limits: VOUT(Q)(min) and VOUT(Q)(max). The available guaranteed
programming range for VOUT(Q) falls within the distributions of
the initial, VOUT(Q)init, and the maximum programming code for
setting VOUT(Q), as shown in the following diagram.
VOUT(Q)(max)
VOUT(Q)(min)
VOUT(Q)init(typ)
Guaranteed Output
Programming
Range, VOUT(Q)
Distribution for
Max Code VOUT(Q)
Distribution for
VOUT(Q)init
Average Quiescent Voltage Output Step Size
The average qui-
escent voltage output step size for a single device is determined
using the following calculation:
V
OUT(Q)maxcode –VOUT(Q)init
2n–1
Step
VOUT(Q) =
.
(1)
where:
n is the number of available programming bits in the trim range,
2n–1 is the value of the maximum programming code in the
range, and
VOUT(Q)maxcode is the quiescent voltage output at code 2
n–1.
Quiescent Voltage Output Programming Resolution
The
programming resolution for any device is half of its programming
step size. Therefore, the typical programming resolution will be:
Err
PGVOUT(Q)(typ)
= 0.5 × Step
VOUT(Q)(typ)
.
(2)
Quiescent Voltage Output Drift Through Temperature Range
Due to internal component tolerances and thermal considerations,
the quiescent voltage output, VOUT(Q), may drift from its nominal
value over the operating ambient temperature, TA. For purposes
of specification, the Quiescent Voltage Output Drift Through
Temperature Range, VOUT(Q) (mV), is defined as:
V
OUT(Q)
V
OUT(Q)(TA) –VOUT(Q)(25°C)
=
.
(3)
VOUT(Q), should be calculated using the actual measured values
of VOUT(Q)(TA) and VOUT(Q)(25°C), rather than programming target
values.
Sensitivity
The presence of a south polarity magnetic field, per-
pendicular to the branded surface of the package face, increases
the output voltage from its quiescent value toward the supply
voltage rail. The amount of the output voltage increase is propor-
tional to the magnitude of the magnetic field applied. Conversely,
the application of a north polarity field decreases the output
voltage from its quiescent value. This proportionality is specified
as the magnetic sensitivity, Sens (mV/G), of the device, and it is
defined for bipolar devices as:
V
OUT(BPOS) – VOUT(BNEG)
BPOS – BNEG
Sens =
,
(4)
and for unipolar devices as:
V
OUT(BPOS) – VOUT(Q)
BPOS
Sens =
,
(5)
where BPOS and BNEG are two magnetic fields with opposite
polarities.
Low-Noise Programmable Linear Hall Effect Sensor ICs with
Adjustable Bandwidth (50 kHz Maximum) and Analog Output
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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A1363LKTTN-1-T 功能描述:IC HALL SENSOR 0.6-1.3MV/G 4SIP 制造商:allegro microsystems, llc 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 類型:線性 技術(shù):霍爾效應(yīng) 軸:單路 感應(yīng)范圍:- 電壓 - 電源:4.5 V ~ 5.5 V 電流 - 電源（最大值）:15mA 電流 - 輸出（最大值）:10mA 輸出類型:模擬電壓 分辨率:- 帶寬:120kHz 工作溫度:-40°C ~ 150°C（TA） 特性:可編程，溫度補(bǔ)償 封裝/外殼:4-SIP 模塊 供應(yīng)商器件封裝:模塊 標(biāo)準(zhǔn)包裝:1
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