參數(shù)資料
型號(hào): A28F400BX-B
廠商: Intel Corp.
英文描述: 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引導(dǎo)塊閃速存儲(chǔ)器)
中文描述: 4兆位(為512k × 8)開機(jī)區(qū)塊快閃記憶體(4兆位(為512k × 8)引導(dǎo)塊閃速存儲(chǔ)器)
文件頁數(shù): 10/34頁
文件大?。?/td> 411K
代理商: A28F400BX-B
A28F400BX-T/B
2.1.2.2 A28F400BX-T Memory Map
The A28F400BX-T device has the 16-Kbyte boot
block located from 3E000H to 3FFFFH to accommo-
date those microprocessors that boot from the top
of the address map. In the A28F400BX-T the first
8-Kbyte parameter block resides in memory space
from 3D000H to 3DFFFH. The second 8-Kbyte pa-
rameter block resides in memory space from
3C000H to 3CFFFH. The 96-Kbyte main block re-
sides in memory space from 30000H to 3BFFFH.
The three 128-Kbyte main blocks reside in memory
space from 20000H to 2FFFFH, 10000H to 1FFFFH
and 00000H to 0FFFFH as shown below in Figure 5.
(Word Addresses)
3FFFFH
16-Kbyte BOOT BLOCK
3DFFFH
3E000H
8-Kbyte PARAMETER BLOCK
3CFFFH
3D000H
8-Kbyte PARAMETER BLOCK
3BFFFH
3C000H
96-Kbyte MAIN BLOCK
2FFFFH
30000H
128-Kbyte MAIN BLOCK
1FFFFH
20000H
128-Kbyte MAIN BLOCK
0FFFFH
10000H
128-Kbyte MAIN BLOCK
00000H
Figure 5. A28F400BX-T Memory Map
3.0
PRODUCT FAMILY PRINCIPLES
OF OPERATION
Flash memory augments EPROM functionality with
in-circuit electrical write and erase. The 4-Mbit flash
family utilizes a Command User Interface (CUI) and
internally generated and timed algorithms to simplify
write and erase operations.
The CUI allows for 100% TTL-level control inputs,
fixed power supplies during erasure and program-
ming, and maximum EPROM compatibility.
In the absence of high voltage on the V
PP
pin, the
4-Mbit boot block flash family will only successfully
execute the following commands: Read Array, Read
Status Register, Clear Status Register and Intelli-
gent Identifier mode. The device provides standard
EPROM read, standby and output disable opera-
tions. Manufacturer Identification and Device Identi-
fication data can be accessed through the CUI or
through the standard EPROM A
9
high voltage ac-
cess (V
ID
) for PROM programming equipment.
The same EPROM read, standby and output disable
functions are available when high voltage is applied
to the V
PP
pin. In addition, high voltage on V
PP
al-
lows write and erase of the device. All functions as-
sociated with altering memory contents: write and
erase, Intelligent Identifier read and Read Status are
accessed via the CUI.
The purpose of the Write State Machine (WSM) is to
completely automate the write and erasure of the
device. The WSM will begin operation upon receipt
of a signal from the CUI and will report status back
through a Status Register. The CUI will handle the
WE
Y
interface to the data and address latches, as
well as system software requests for status while the
WSM is in operation.
3.1 Bus Operations
Flash memory reads, erases and writes in-system
via the local CPU. All bus cycles to or from the flash
memory conform to standard microprocessor bus
cycles.
10
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A28F400BX-T 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY
A28F400BX-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:A28F400BX-T/B
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