- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄352476 > A42MX16-1CQ100I (Electronic Theatre Controls, Inc.) IC LI-ION BATT CHARGER 10-MLP PDF資料下載
參數(shù)資料
| 型號： | A42MX16-1CQ100I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | IC LI-ION BATT CHARGER 10-MLP |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數(shù)： | 53/120頁 |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-1CQ100I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁當前第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁
38
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unprogrammed,
the CLKPS bits will be reset to “000”. If CKDIV8 is programmed, CLKPS bits are reset to “011”,
giving a division factor of 8 at start up. This feature should be used if the selected clock source
has a higher frequency than the maximum frequency of the device at the present operating con-
ditions. Note that any value can be written to the CLKPS bits regardless of the CKDIV8 Fuse
setting. The Application software must ensure that a sufficient division factor is chosen if the
selected clock source has a higher frequency than the maximum frequency of the device at the
present operating conditions. The device is shipped with the CKDIV8 Fuse programmed.
Figure 3-14. System Clock Prescaler and Timer Clock Prescaler
3.8
Power Management and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU to save power.
The Atmel ATA6289 provides various sleep modes allowing the user to tailor the power con-
sumption to the application's requirements.
To enter one out of three sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, Sensor Noise Reduction, Power-down) will be activated by the SLEEP
instruction, see Table 3-11 on page 39 for details. If an enabled interrupt occurs while the MCU
is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the
start-up time, executes the interrupt routine, and resumes execution from the instruction follow-
ing SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes
up from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the
Reset Vector.
Figure 3-13 on page 32 presents the different clock systems and their distribution and this is in
combination with Table 3-11 on page 39 helpful to select the appropriate sleep mode.
/2
CLT
CLTPS(2:0)
CLK
CL
/2
MUX
/2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX16-1CQ100M | IC I2C PROG PENTA ULDO 20-MLP |
| A42MX16-1PL100 | 40MX and 42MX FPGA Families |
| A42MX16-1PL100A | IC TVS BI-DIR 5V 350W SOD-323 |
| A42MX16-1PL100B | 40MX and 42MX FPGA Families |
| A42MX16-1PL100ES | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-1CQ100M | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families |
| A42MX16-1PL100 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families |
| A42MX16-1PL100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-1PL100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-1PL100ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families |
發(fā)布緊急采購，3分鐘左右您將得到回復。