參數(shù)資料
型號: A42MX24-3PL100
廠商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 25/93頁
文件大?。?/td> 854K
代理商: A42MX24-3PL100
31
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
FIGURE 10. RT (and MONITOR) INTERRUPT STATUS QUEUE
(shown for message Interrupt event)
INTERRUPT
VECTOR
DATA WORD
BLOCK
DESCRIPTOR
STACK
PARAMETER
(POINTER)
INTERRUPT STATUS QUEUE
(64 Locations)
INTERRUPT VECTOR
QUEUE POINTER
REGISTER (IF)
BLOCK STATUS WORD
TIME TAG
DATA BLOCK POINTER
RECEIVED COMMAND
NEXT
VECTOR
FIGURE 9. 50% and 100% ROLLOVER INTERRUPTS
DATA POINTER
CIRCULAR
BUFFER*
(128,256,...8192 WORDS)
LOOK-UP TABLE
RECEIVED
(TRANSMITTED)
MESSAGE DATA
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND WORD
DESCRIPTOR STACK
50%
ROLLOVER
INTERRUPT
50%
The example shown is for an RT Subaddress Circular Buffer.
The 50% and 100% Rollover Interrupts are also applicable to
the RT Global Circular Buffer, RT Command Stack,
Monitor Command Stack, and Monitor Data Stack.
Note
100%
ROLLOVER
INTERRUPT
100%
相關(guān)PDF資料
PDF描述
A42MX24-3PL100A 40MX and 42MX FPGA Families
A42MX24-3PQ100A 40MX and 42MX FPGA Families
A42MX24-3VQ100 40MX and 42MX FPGA Families
A42MX24-3VQ100A 40MX and 42MX FPGA Families
A42MX24-3VQ100B 40MX and 42MX FPGA Families
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