參數(shù)資料
型號: AD13280
廠商: Analog Devices, Inc.
英文描述: ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86%
中文描述: 雙通道,12位,80 MSPS的A / D轉(zhuǎn)換的模擬輸入信號調(diào)理
文件頁數(shù): 3/20頁
文件大小: 1353K
代理商: AD13280
REV. 0
–3–
AD13280
Test
Level
Mil
Subgroup
AD13280AZ/BZ
Min
Typ
Parameter
Temp
Max
Unit
SPURIOUS-FREE DYNAMIC RANGE
1, 8
Analog Input @ 10 MHz
25
°
C
Min
Max
25
°
C
Min
Max
25
°
C
Min
Max
I
II
II
I
II
II
I
II
II
4
6
5
4
6
5
4
6
5
75
70
75
68
67
68
56
55
56
80
dBFS
Analog Input @ 21 MHz
75
dBFS
Analog Input @ 37 MHz
62
dBFS
SINGLE-ENDED ANALOG INPUT
Passband Ripple to 10 MHz
Passband Ripple to 25 MHz
25
°
C
25
°
C
V
V
0.05
0.1
dB
dB
DIFFERENTIAL ANALOG INPUT
Passband Ripple to 10 MHz
Passband Ripple to 25 MHz
TWO-TONE IMD REJECTION
9
f
IN
= 9.1 MHz and 10.1 MHz
f
1
and f
2
are –7 dB
25
°
C
25
°
C
V
V
0.3
0.82
dB
dB
25
°
C
Min
Max
25
°
C
I
II
II
V
4
6
5
4
75
71
75
80
dBc
f
IN
= 19.1 MHz and 20.7 MHz
f
1
and f
2
are –7 dB
f
IN
= 36 MHz and 37 MHz
f
1
and f
2
are –7 dB
CHANNEL-TO-CHANNEL ISOLATION
10
77
dBc
25
°
C
V
4
60
dBc
25
°
C
25
°
C
IV
12
90
dB
TRANSIENT RESPONSE
DIGITAL OUTPUTS
11
Logic Compatibility
DVCC = 3.3 V
Logic “1” Voltage
Logic “0” Voltage
DVCC = 5 V
Logic “1” Voltage
Logic “0” Voltage
Output Coding
V
25
ns
CMOS
Full
Full
I
I
1, 2, 3
1, 2, 3
2.5
DVCC – 0.2
0.2
V
V
0.5
Full
Full
V
V
DVCC – 0.3
0.35
V
V
Two’s Complement
POWER SUPPLY
AV
CC
Supply Voltage
12
I (AV
CC
) Current
AV
EE
Supply Voltage
12
I (AV
EE
) Current
DV
CC
Supply Voltage
12
I (DV
CC
) Current
I
CC
(Total) Supply Current per Channel
Power Dissipation (Total)
Power Supply Rejection Ratio (PSRR)
Full
Full
Full
Full
Full
Full
Full
Full
Full
IV
I
IV
I
IV
I
I
I
V
4.85
5.0
310
–5.0
38
3.3
34
369
3.72
0.01
5.25
338
–4.75
49
3.465
46
433
4.05
V
mA
V
mA
V
mA
mA
W
% FSR/% V
S
1, 2, 3
–5.25
1, 2, 3
3.135
1, 2, 3
1, 2, 3
1, 2, 3
NOTES
All ac specifications tested by driving ENCODE and
ENCODE
differentially. Single-ended input: AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.
2
Gain tests are performed on AMP-IN-X-1 input voltage range.
3
Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4
For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180
°
out of phase). For single-ended input: +IN = 2 V p-p and = –IN = GND.
5
Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50%
±
5%.
6
Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 80 MSPS. SNR
is reported in dBFS, related back to converter full scale.
7
Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 80 MSPS. SINAD is
reported in dBFS, related back to converter full scale.
8
Analog Input signal at –1 dBFS; SFDR is ratio of converter full scale to worst spur.
9
Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.
10
Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B Channel.
11
Digital output logic levels: DV
= 3.3 V, C
= 10 pF. Capacitive loads > 10 pF will degrade performance.
12
Supply voltage recommended operating range. AV
CC
may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AV
CC
= 5.0 V to 5.25 V.
Specifications subject to change without notice.
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