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參數(shù)資料
| 型號： | AD1672 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 12-Bit, 3 MSPS Monolithic A/D Converter(完備的12位單片A/D轉換器) |
| 中文描述： | 完整的12位，3 MSPS的單片機的A / D轉換器（完備的12位單片的A / D轉換器） |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 480K |
| 代理商： | AD1672 |
AD1672
REV. 0
–9–
APPLYING THE AD1672
ANALOG INPUTS
Figure 9 shows the equivalent analog input of the AD1672. The
input SHA and associated resistor network topology can be eas-
ily configured for either unipolar (0 V to 2.5 V, 0 V to 5.0 V) or
bipolar (–2.5 V to 2.5 V) input signals as shown in Figure 10.
The nominal input resistance, R
IN
, of the AD1672 is 2 k
for a
2.5 V span and 4 k
for a 5 V span. The circuit topology both
level shifts and inverts the analog input for the various input
spans.
SHA
OUT
AIN 1
4k
2k
V
1.25V
4k
AIN 2
2k
Figure 9. Equivalent Analog Input Circuit
21
22
20
23
1μF
AIN1
AIN2
AD1672
REFOUT
REFIN
V
IN
21
22
20
23
1μF
AIN1
AIN2
AD1672
REFOUT
REFIN
V
IN
21
22
20
23
1μF
AIN1
AIN2
AD1672
REFOUT
REFIN
V
IN
a. 0 to +2.5 V Input Range
b. 0 to +5.0 V Input Range
c. –2.5 to +2.5 V Input Range
Figure 10. Input Range Connections
In applications where ac coupling of the analog input signal is
appropriate such as in a single supply system, the user can
capacitively couple the input signal for a 2.5 V or 5 V span thus
removing any preceding system dc offsets. Figure 11 shows the
proper configurations of the AD1672 for ac coupling. Main-
taining the specifications outlined in the data sheet requires care-
ful selection of the component values. The most important
concern is that the f
–3 dB
high pass corner is a function of C1 and
C2 in parallel with R
IN
. The f
-3 dB
point can be approximated
by the equation
/
f
–3
dB
=
1/(2
× π ×
R
IN
×
C
EQ
)
where C
EQ
is the parallel combination of C1 and C2. Note that
C1 is typically a large electrolytic or tantalum capacitor that be-
comes inductive at high frequencies. Adding a small ceramic
capacitor on the order of 0.1
μ
F that does not become inductive
until negligibly higher frequencies maintains a low impedance
over a wide frequency range.
21
22
25
20
23
C1
C2
1.0μF
10μF
1.0μF
ANALOG
INPUT
AIN1
AIN2
NCOMP2
REF
OUT
REFIN
AD1672
21
22
25
20
23
1C1
C2
1.0μF
10μF
1.0μF
ANALOG
INPUT
AIN1
AIN2
NCOMP2
REF
OUT
REFIN
AD1672
2.5V Span
5.0V Span
Figure 11. AC Coupled Inputs
In applications requiring dc coupling, a buffer amplifier is rec-
ommended for driving the AD1672 input. Any source resis-
tance will contribute to both gain and offset error due to its
interaction with the AD1672’s input resistance. The particular
application and signal input range will determine how the buffer
amplifier is configured. For example, in dc precision applica-
tions, the buffer amplifier can be configured for convenient gain
and offset adjustment as shown in Figure 12. In spectral
analysis/signal processing applications, the buffer amplifier can
be configured as a 2nd order antialiasing filter in a Sallen-Key
or Multiple-Feedback topology as shown in Figure 13.
V
CC
500
50
500
5k
50
5k
0.1μF
V
EE
ANALOG
INPUT
OFFSET
ADJUSTMENTS
GAIN
ADJUSTMENT
AD1672
AIN
Figure 12. Offset and Gain Adjustment
V
IN
V
OUT
C2
R4
C1
R2
R1
R3
V
IN
V
OUT
C2
C1
R2
R1
R3
Figure 13. Sallen-Key and Multiple-Feedback
Antialiasing Filter Topologies
In imaging and multiplexed data acquisition applications, the
AD1672’s wide input bandwidth facilitates rapid acquisition of
transient input signals: the input SHA can typically settle to 12-
bit accuracy from a full scale input step in less than 150 ns. Fig-
ure 14 illustrates the typical acquisition of a full scale input step.
For amplifiers that are powered by supplies greater than
6.5 V, it is recommended that a clamping circuit be included at
the input of AD1672. This circuit limits the input voltage to
6.5 V under a fault condition.
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