參數(shù)資料
型號(hào)： AD5325ARM
廠商： ANALOG DEVICES INC
元件分類(lèi)： DAC
英文描述： 2.5 V to 5.5 V, 500 uA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs
中文描述： SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10
封裝： MO-187BA, MSOP-10
文件頁(yè)數(shù)： 17/20頁(yè)
文件大?。?/td> 427K
代理商： AD5325ARM
REV. F
AD5305/AD5315/AD5325
–17–
1 F
REFIN
V
DD
GND
V
OUT
B
0.1 F
10 F
V
DD
= 5V
V
OUT
V
IN
GND
EXT
REF
AD820/
OP295
5V
R3
51.2k
R4
390
AD780/REF192
WITH V
DD
= 5V
V
OUT
A
R1
390
R2
51.2k
V
OUT
1/2
AD5305/
AD5315/
AD5325
*
*
ADDITIONAL PINS OMITTED FOR CLARITY
Figure 15. Coarse/Fine Adjustment
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5305/AD5315/AD5325 is mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD5305/AD5315/AD5325
is in a system where multiple devices require an AGND-to-DGND
connection, the connection should be made at one point only.
The star ground point should be established as close as possible
to the device. The AD5305/AD5315/AD5325 should have ample
supply bypassing of 10
μ
F in parallel with 0.1
μ
F on the supply
located as close to the package as possible, ideally right up against
the device. The 10
μ
F capacitors are the tantalum bead type.
The 0.1
μ
F capacitor should have low effective series resistance
(ESR) and effective series inductance (ESI), like the common
ceramic types that provide a low impedance path to ground at
high frequencies, to handle transient currents due to internal
logic switching.
The power supply lines of the AD5305/AD5315/AD5325 should
use as large a trace as possible to provide low impedance paths
and reduce the effects of glitches on the power supply line. Fast
switching signals such as clocks should be shielded with digital
ground to avoid radiating noise to other parts of the board, and
should never be run near the reference inputs. A ground line
routed between the SDA and SCL lines will help reduce crosstalk
between them (not required on a multilayer board as there will
be a separate ground plane, but separating the lines will help).
Avoid crossover of digital and analog signals. Traces on oppo-
site sides of the board should run at right angles to each other.
This reduces the effects of feedthrough through the board. A
microstrip technique is by far the best, but is not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to ground plane while signal traces
are placed on the solder side.
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