參數(shù)資料
型號(hào)： AD5343*
廠商： Analog Devices, Inc.
英文描述： 2.5 V to 5.5 V. 230 uA. Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs
中文描述： 2.5伏至5.5伏230微安。并行接口雙電壓輸出數(shù)模轉(zhuǎn)換器8-/10-/12-Bit
文件頁(yè)數(shù)： 13/20頁(yè)
文件大小： 274K
REV. 0
AD5332/AD5333/AD5342/AD5343
–
13
–
I
DD
–
A
F
0
100
150
400
200
250
350
300
V
DD
= +5V
V
DD
= +3V
Figure 23. I
DD
Histogram with V
DD
= 3
V and V
DD
= 5 V
–
0.4
0
6
1
2
3
4
5
V
REF
–
V
F
–
–
0.2
0
0.2
T
A
= 25 C
V
REF
= 2V
Figure 26. Full-Scale Error vs. V
REF
500 ns/DIV
0.939
0.938
0.937
0.936
0.935
0.934
0.933
0.932
0.931
0.930
0.929
V
O
–
Figure 24. AD5342 Major-Code Tran-
sition Glitch Energy
4
750ns/DIV
Figure 27. DAC-DAC Crosstalk
FREQUENCY
–
kHz
10
–
40
0.01
–
20
–
30
0
–
10
d
0.1
1
10
100
1k
10k
–
50
–
60
Figure 25. Multiplying Bandwidth
(Small-Signal Frequency Response)
FUNCTIONAL DESCRIPTION
The AD5332/AD5333/AD5342/AD5343 are dual DACs fabri-
cated on a CMOS process with resolutions of 8, 10, 12, and
12 bits, respectively. They are written to using a parallel inter-
face. They operate from single supplies of 2.5 V to 5.5 V and
the output buffer amplifiers offer rail-to-rail output swing. The
AD5333 and AD5342 have reference inputs that may be buff-
ered to draw virtually no current from the reference source.
Their output voltage range may be configured to be 0 to V
REF
or 0 to 2 V
REF
. The reference inputs of the AD5332 and AD5343
are unbuffered and their output range is 0 to V
REF
. The devices
have a power-down feature that reduces current consumption to
only 80 nA @ 3 V.
Digital-to-Analog Section
The architecture of one DAC channel consists of a reference
buffer and a resistor-string DAC followed by an output buffer
amplifier. The voltage at the V
REF
pin provides the reference
voltage for the DAC. Figure 28 shows a block diagram of the
DAC architecture. Since the input coding to the DAC is straight
binary, the ideal output voltage is given by:
V
V
D
N
2
Gain
OUT
REF
=
×
×
where:
D
= decimal equivalent of the binary code which is loaded to
the DAC register:
0–255 for AD5332 (8 Bits)
0–1023 for AD5333 (10 Bits)
0–4095 for AD5342/AD5343 (12 Bits)
N
= DAC resolution
Gain
= Output Amplifier Gain (1 or 2)
V
OUT
GAIN
V
REF
BUF
DAC
REGISTER
INPUT
REGISTER
RESISTOR
STRING
OUTPUT
BUFFER AMPLIFIER
REFERENCE
BUFFER
Figure 28. Single DAC Channel Architecture
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5343BRU 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 12-bit 20-Pin TSSOP 制造商:Analog Devices 功能描述:12BIT DAC DUAL SMD 5343 TSSOP20
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AD5343BRU-REEL7 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 12-bit 20-Pin TSSOP T/R
AD5343BRUZ 功能描述:IC DAC 12BIT DUAL VOUT 20TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類(lèi)型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF)
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