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參數(shù)資料
| 型號： | AD5343* |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2.5 V to 5.5 V. 230 uA. Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs |
| 中文描述： | 2.5伏至5.5伏230微安。并行接口雙電壓輸出數(shù)模轉(zhuǎn)換器8-/10-/12-Bit |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 274K |
REV. 0
AD5332/AD5333/AD5342/AD5343
–
5
–
AD5332 FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
DAC
REGISTER
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INTER-
FACE
LOGIC
DB
7
.
.
DB
0
CS
WR
A0
CLR
LDAC
V
REF
A
RESET
V
REF
B
V
OUT
A
BUFFER
AD5332
V
OUT
B
BUFFER
V
DD
POWER-DOWN
LOGIC
PD
GND
8-BIT
DAC
8-BIT
DAC
AD5332 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
2
3
4
5
6
7
8
9
10
V
REF
B
V
REF
A
V
OUT
A
V
OUT
B
GND
CS
WR
A0
CLR
LDAC
Unbuffered reference input for DAC B.
Unbuffered reference input for DAC A.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active low Chip Select Input. This is used in conjunction with
WR
to write data to the parallel interface.
Active low Write Input. This is used in conjunction with
CS
to write data to the parallel interface.
Address pin for selecting which DAC A and DAC B.
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
Active low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
Eight Parallel Data Inputs. DB
7
is the MSB of these eight bits.
11
12
PD
V
DD
13–20
DB
0
–DB
7
AD5332 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD5332
LDAC
A0
WR
CS
GND
V
REF
B
V
REF
A
V
OUT
B
V
OUT
A
PD
V
DD
DB
0
DB
1
DB
2
DB
3
DB
4
DB
5
DB
6
DB
7
8-BIT
CLR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5343 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5343BRU | Dual 12-bit 65MSPS ADC with serialized LVDS Output 48-VQFN -40 to 85 |
| AD5334BRU | 2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs |
| AD5327 | Dual-Channel 14bit, 65MSPS Analog-to-Digital Converter 80-HTQFP -40 to 85 |
| AD5338 | 2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5343BRU | 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 12-bit 20-Pin TSSOP 制造商:Analog Devices 功能描述:12BIT DAC DUAL SMD 5343 TSSOP20 |
| AD5343BRU-REEL | 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 12-bit 20-Pin TSSOP T/R |
| AD5343BRU-REEL7 | 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 12-bit 20-Pin TSSOP T/R |
| AD5343BRUZ | 功能描述:IC DAC 12BIT DUAL VOUT 20TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
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