參數(shù)資料
型號(hào): AD5343
廠商: Analog Devices, Inc.
英文描述: 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
中文描述: 2.5 V至5.5 V,115微安,并行接口單電壓輸出DAC的8-/10-/12-Bit
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 274K
代理商: AD5343
REV. 0
AD5332/AD5333/AD5342/AD5343
7
AD5342 FUNCTIONAL BLOCK DIAGRAM
V
OUT
A
BUFFER
AD5342
V
OUT
B
BUFFER
POWER-ON
RESET
DAC
REGISTER
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INTER-
FACE
LOGIC
V
DD
DB
11
DB
0
CS
WR
A0
CLR
LDAC
.
.
V
REF
A
POWER-DOWN
LOGIC
RESET
PD
GND
V
REF
B
12-BIT
DAC
12-BIT
DAC
AD5342 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
2
3
4
5
6
7, 8
9
10
11
12
13
14
GAIN
BUF
V
REF
B
V
REF
A
V
OUT
A
V
OUT
B
NC
GND
CS
WR
A0
CLR
LDAC
Gain Control Pin. This controls whether the output range from the DAC is 0-V
REF
or 0-2 V
REF
.
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
Reference Input for DAC B.
Reference Input for DAC A.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
No Connect.
Ground reference point for all circuitry on the part.
Active Low Chip Select Input. This is used in conjunction with
WR
to write data to the parallel interface.
Active low Write Input. This is used in conjunction with
CS
to write data to the parallel interface.
Address pin for selecting between DAC A and DAC B.
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
Active low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
12 Parallel Data Inputs. DB
11
is the MSB of these 12 bits.
15
16
PD
V
DD
17–28
DB
0
–DB
11
AD5342 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD5342
LDAC
A0
WR
CS
GND
BUF
V
REF
B
V
REF
A
V
OUT
A
V
OUT
B
GAIN
PD
V
DD
DB
0
DB
1
DB
2
DB
3
DB
4
DB
9
DB
8
DB
7
DB
5
DB
6
12-BIT
NC
NC
CLR
DB
10
DB
11
NC = NO CONNECT
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