參數(shù)資料
型號(hào)： AD5381BSTZ-5-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/40頁(yè)
文件大小： 0K
描述： IC DAC 12BIT 40CH 5V 100-LQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告： AD5381,3 Redesign Change 24/Oct/2011
設(shè)計(jì)資源： 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010)
AD5381 Channel Monitor Function (CN0013)
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 6µs
位數(shù)： 12
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 40
電壓電源： 單電源
功率耗散（最大）： 80mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型： 40 電壓，單極
采樣率（每秒）： 167k
其它名稱： AD5381BSTZ-5-REELDKR
AD5381
Data Sheet
Rev. D | Page 14 of 40
PIN CONFIGURATIONAND FUNCTION DESCRIPTIONS
RESET
DB5
DB4
DB3
DB2
DB1
DB0
NC
REG0
REG1
VOUT23
VOUT22
VOUT21
VOUT20
AVDD3
AGND3
DAC_GND3
SIGNAL_GND3
VOUT19
VOUT18
VOUT17
VOUT16
AVDD2
AGND2
59
74
75
69
70
71
72
67
68
66
73
64
65
60
61
62
63
57
58
55
56
53
54
52
51
SIGNAL_GND5
DAC_GND5
AGND5
AVDD5
VOUT5
VOUT6
VOUT7
VOUT32
VOUT33
VOUT34
VOUT35
VOUT36
VOUT37
VOUT38
VOUT39/MON_OUT
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
DAC_GND2
SIGNAL_GND2
VOUT13
VOUT14
VOUT15
26
28
27
29
30
32
33
34
35
36
31
37
38
39
40
42
43
44
45
41
46
47
48
49
50
CS/(SYNC/AD0)
DB11/(DIN/SDA)
DB10/(SCLK/SCL)
DB9/(SPI/I
2
C)
DB8
DB7
DB6
SDO/(A/B)
DVDD
DGND
A5
A4
A3
A2
A1
A0
DVDD
DGND
SER/PAR
PD
WR
(DCEN/AD1)
LDAC
BUSY
100
98
99
97
96
95
94
92
91
90
89
88
87
93
86
85
84
82
81
80
79
78
77
76
83
5
4
3
2
7
6
9
8
1
14
13
12
11
16
15
17
10
19
18
23
22
21
20
24
25
FIFO EN
CLR
VOUT24
VOUT25
VOUT26
VOUT27
SIGNAL_GND4
DAC_GND4
AGND4
AVDD4
VOUT28
VOUT29
VOUT30
VOUT31
REFGND
REFOUT/REFIN
SIGNAL_GND1
DAC_GND1
AVDD1
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
AGND1
PIN 1
IDENTIFIER
AD5381
TOP VIEW
(Not to Scale)
03732-008
NC = NO CONNECT
Figure 8. 100-Lead LQFP Pin Configuration
Table 9. PinFunction Descriptions
Mnemonic
Function
VOUTx
Buffered Analog Outputs forChannel x. Each analogoutput is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 k to ground. Typical output impedance is 0.5 .
SIGNAL_GND(1–5)
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5381.
DAC_GND(1–5)
Each group of eight channels contains a DAC_GND pin. This is the ground reference point for the internal 12-bit DAC.
These pins shound be connected to the AGND plane.
AGND(1–5)
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
AVDD(1–5)
Analog Supply Pins. Each group of eight channels has a separate AVDD pin. These pins are shorted internallyand
should be decoupled with a 0.1 F ceramic capacitor and 10 F tantalum capacitor. Operating range for the
AD5381-5 is 4.5 V to 5.5 V; operating range for the AD5381-3 is 2.7 V to 3.6 V.
DGND
Ground for All Digital Circuitry.
DVDD
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with a 0.1 F ceramic and a 10 F tantalum capacitors to DGND.
REFGND
Ground Reference Point for the Internal Reference.
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