參數(shù)資料
型號: AD5383BSTZ-5
廠商: Analog Devices Inc
文件頁數(shù): 16/40頁
文件大?。?/td> 0K
描述: IC DAC 12BIT 32CH 5V 100-LQFP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5381,3 Redesign Change 24/Oct/2011
設計資源: 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5383 (CN0014)
AD5383 Channel Monitor Function (CN0015)
標準包裝: 1
設置時間: 6µs
位數(shù): 12
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 32
電壓電源: 單電源
功率耗散(最大): 65mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-LQFP(14x14)
包裝: 托盤
輸出數(shù)目和類型: 32 電壓,單極;32 電壓,雙極
采樣率(每秒): 167k
Data Sheet
AD5383
Rev. C | Page 23 of 40
Table 15. Control Register Contents
MSB
LSB
CR11
CR10
CR9
CR8
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
Control Register Write/Read
REG1 = REG0 = 0, A4 to A0 = 01100, R/W status determines if
the operation is a write (R/W = 0) or a read (R/W = 1). DB11 to
DB0 contains the control register data.
Control Register Contents
CR11: Power-Down Status. This bit is used to configure the
output amplifier state in power down.
CR11 = 1. Amplifier output is high impedance (default on
power-up).
CR11 = 0. Amplifier output is 100 k to ground.
CR10: REF Select. This bit selects the operating internal
reference for the AD5383. CR12 is programmed as follows:
CR10 = 1: Internal reference is 2.5 V (AD5383-5 default), the
recommended operating reference for AD5383-5.
CR10 = 0: Internal reference is 1.25 V (AD5383-3 default),
the recommended operating reference for AD5383-3.
CR9: Current Boost Control. This bit is used to boost the
current in the output amplifier, thereby altering its slew rate.
This bit is configured as follows:
CR9 = 1: Boost Mode On. This maximizes the bias current in
the output amplifier, optimizing its slew rate but increasing
the power dissipation.
CR9 = 0: Boost Mode Off (default on power-up). This
reduces the bias current in the output amplifier and reduces
the overall power consumption.
CR8: Internal/External Reference. This bit determines if the
DAC uses its internal reference or an externally applied
reference.
CR8 = 1: Internal Reference Enabled. The reference output
depends on data loaded to CR10.
CR8 = 0: External Reference Selected (default on power up).
CR7: Channel Monitor Enable (see Channel Monitor
CR7= 1: Monitor Enabled. This enables the channel monitor
function. After a write to the monitor channel in the SFR
register, the selected channel output is routed to the
MON_OUT pin.
CR7 = 0: Monitor Disabled (default on power-up). When the
monitor is disabled, the MON_OUT pin is three-stated.
CR6: Thermal Monitor Function. This function is used to
monitor the AD5383’s internal die temperature when enabled.
The thermal monitor powers down the output amplifiers when
the temperature exceeds 130°C. This function can be used to
protect the device in cases where power dissipation may be
exceeded if a number of output channels are simultaneously
short-circuited. A soft power-up will re-enable the output
amplifiers if the die temperature has dropped below 130°C.
CR6 = 1: Thermal Monitor Enabled.
CR6 = 0: Thermal Monitor Disabled (default on power-up).
CR5 and CR4: Don’t Care.
CR3 to CR0: Toggle Function Enable. This function allows the
user to toggle the output between two codes loaded to the A
and B registers for each DAC. Control Register Bits CR3 to CR0
are used to enable individual groups of eight channels for oper-
ation in toggle mode. A Logic 1 written to any bit enables a
group of channels; a Logic 0 disables a group. LDAC is used to
toggle between the two registers. Logic 1 enables a group of
channels; Logic 0 disables a group of channels.
Table 16.
CR Bit
Group
Channels
CR3
3
24 to 31
CR2
2
16 to 23
CR1
1
8 to 15
CR0
0
0 to 7
Channel Monitor Function
REG1 = REG0 = 0, A4 to A0 = 01010
DB11 to DB6 = Contain data to address the monitored channel.
A channel monitor function is provided on the AD5383. This
feature, which consists of a multiplexer addressed via the
interface, allows any channel output or signals connected to the
MON_IN pins to be routed to the MON_OUT pin for
monitoring using an external ADC. The channel monitor
function must be enabled in the control register before any
channels are routed to MON_OUT. On the AD5383, DB11 to
DB6 contain the channel address for the monitored channel.
Selecting Channel Address 63 three-states MON_OUT.
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