參數(shù)資料
型號(hào): AD5391BCPZ-5-REEL
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 34/44頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT 16CHAN 5V 64-LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5390/1/2 Redesign Change 16/May/2012
設(shè)計(jì)資源: 8 to 16 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5390/1/2 (CN0029)
AD5390/91/92 Channel Monitor Function (CN0030)
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 6µs
位數(shù): 12
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 16
電壓電源: 單電源
功率耗散(最大): 35mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: 16 電壓,單極
采樣率(每秒): 167k
配用: EVAL-AD5391EBZ-ND - BOARD EVALUATION FOR AD5391
AD5390/AD5391/AD5392
Data Sheet
Rev. E | Page 4 of 44
GENERAL DESCRIPTION
The AD5390/AD5391 are complete single-supply, 16-channel,
14-bit and 12-bit DACs, respectively. The AD5392 is a complete
single-supply, 8-channel, 14-bit DAC. The devices are available
in either a 64-lead LFCSP or a 52-lead LQFP. All channels have
an on-chip output amplifier with rail-to-rail operation. All
devices include an internal 1.25/2.5 V, 10 ppm/°C reference, an
on-chip channel monitor function that multiplexes the analog
outputs to a common MON_OUT pin for external monitoring,
and an output amplifier boost mode that optimizes the output
amplifier slew rate.
The AD5390/AD5391/AD5392 contain a 3-wire serial interface
with interface speeds in excess of 30 MHz that are compatible
with SPI, QSPI, MICROWIRE, and DSP interface standards
and an I2C-compatible interface supporting a 400 kHz data
transfer rate.
An input register followed by a DAC register provides double-
buffering, allowing DAC outputs to be updated independently
or simultaneously using the LDAC input. Each channel has a
programmable gain and offset adjust register, letting the user
fully calibrate any DAC channel.
Power consumption is typically 0.25 mA per channel.
Table 1. Additional High Channel Count, Low Voltage, Single-Supply DACs in Portfolio
Model
Resolution
AVDD Range
Output
Channels
Linearity Error (LSB)
Package Description
Package Option
14 Bits
4.5 V to 5.5 V
40
±4
100-Lead LQFP
ST-100
14 Bits
2.7 V to 3.6 V
40
±4
100-Lead LQFP
ST-100
12 Bits
4.5 V to 5.5 V
40
±1
100-Lead LQFP
ST-100
12 Bits
2.7 V to 3.6 V
40
±1
100-Lead LQFP
ST-100
14 Bits
4.5 V to 5.5 V
32
±4
100-Lead LQFP
ST-100
14 Bits
2.7 V to 3.6 V
32
±4
100-Lead LQFP
ST-100
12 Bits
4.5 V to 5.5 V
32
±1
100-Lead LQFP
ST-100
12 Bits
2.7 V to 3.6 V
32
±1
100-Lead LQFP
ST-100
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