參數(shù)資料
型號(hào): AD5422BCPZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 33/44頁(yè)
文件大?。?/td> 0K
描述: IC DAC 16BIT SRL 40LFCSP
設(shè)計(jì)資源: 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065)
Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 25µs
位數(shù): 16
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 950mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 40-LFCSP-VQ(6x6)
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類(lèi)型: 1 電流,單極;1 電流,雙極;1 電壓,單極;1 電壓,雙極
采樣率(每秒): 40k
其它名稱(chēng): AD5422BCPZ-REEL7DKR
Data Sheet
AD5412/AD5422
Rev. I | Page 39 of 44
Table 25. Thermal and Supply Considerations for Each Package
Considerations
TSSOP
LFCSP
Maximum Allowed Power
Dissipation When Operating at an
Ambient Temperature of 85°C
mW
14
.
1
35
85
125
=
=
JA
A
J
T
max
T
θ
W
21
.
1
33
85
125
=
=
JA
A
J
T
max
T
θ
Maximum Allowed Ambient
Temperature When Operating
from a Supply of 40 V and Driving
24 mA Directly to Ground
C
86
35
)
028
.
0
40
(
125
°
=
×
=
×
JA
D
J
P
max
T
θ
C
88
33
)
028
.
0
40
(
125
°
=
×
=
×
JA
D
J
P
max
T
θ
Maximum Allowed Supply
Voltage When Operating at an
Ambient Temperature of 85°C and
Driving 24 mA Directly to Ground
V
40
35
028
.
0
85
125
=
×
=
×
JA
DD
A
J
AI
T
max
T
θ
V
43
33
028
.
0
85
125
=
×
=
×
JA
DD
A
J
AI
T
max
T
θ
INDUSTRIAL ANALOG OUTPUT MODULE
Many industrial control applications have requirements for
accurately controlled current and voltage output signals. The
AD5412/AD5422 are ideal for such applications. Figure 83 shows
the AD5412/AD5422 in a circuit design for an output module,
specifically for use in an industrial control application. The design
provides for a current or voltage output. The module is powered
from a field supply of 24 V. This supplies AVDD directly. An inverting
buck regulator generates the negative supply for AVSS. For transient
overvoltage protection, transient voltage suppressors (TVS) are
placed on all field accessible connections. A 24 V volt TVS is placed
on each IOUT, VOUT, +VSENSE, and VSENSE connection, and a 36 V TVS
is placed on the field supply input. For added protection, clamping
diodes are connected from the IOUT, VOUT, +VSENSE, and VSENSE
pins to the AVDD and AVSS power supply pins. If remote voltage load
sensing is not required, the +VSENSE pin can be directly connected to
the VOUT pin and the –VSENSE pin can be connected to GND.
Isolation between the AD5412/AD5422 and the backplane
circuitry is provided with ADuM1400 and ADuM1200 iCoupler
digital isolators; further information on iCoupler products is
available at www.analog.com/isolators. The internally generated
digital power supply of the AD5412/AD5422 powers the field
side of the digital isolaters, removing the need to generate a digital
power supply on the field side of the isolation barrier. The AD5412/
AD5422 digital supply output supplies up to 5 mA, which is more
than enough to supply the 2.8 mA requirements of the ADuM1400
and ADuM1200 operating at a logic signal frequency of up to
1 MHz. To reduce the number of isolators required, nonessen-
tial signals such as CLEAR can be connected to GND. FAULT
and SDO can be left unconnected, reducing the isolation
requirements to just three signals. See Circuit Note CN0321 for
an example of a built and tested circuit of a fully isolated, single
channel voltage and 4 mA to 20 mA output with HART.
INDUSTRIAL HART CAPABLE ANALOG OUTPUT
APPLICATION
Many industrial control applications have requirements for
accurately controlled current output signals, and the AD5412/
AD5422 are ideal for such applications. Figure 82 shows the
AD5412/AD5422 in a circuit design for a HART-enabled output
module, specifically for use in an industrial control application in
which both the voltage output and current output are available—
one at a time—on one pin, thus reducing the number of screw
connections required. There is no conflict with tying the two output
pins together because only the voltage output or the current output
can be enabled at any one time. For further information on this
The design provides for a HART-enabled current output, with
the HART capability provided by the AD5700/AD5700-1 HART
modem, the industry’s lowest power and smallest footprint HART-
compliant IC modem. For additional space-savings, the AD5700-1
offers a 0.5% precision internal oscillator. The HART_OUT signal
from the AD5700 is attenuated and ac-coupled into the RSET pin
of the AD5412/AD5422. Because the RSET pin is used to couple
the HART signal into the AD5412/AD5422, either the TSSOP or
LFCSP package option can be used for this configuration. It should
be noted however, that since the TSSOP package does not have
a CAP1 pin, C1 (see Figure 82) cannot be inserted in this case.
While the TSSOP equivalent circuit (as in Figure 82 but without
C1 in place) still passes the HART Communication Foundation
physical layer specs, the results with C1 in place are superior to
those without C1 in place. Further information on an alternative
configuration, whereby the HART signal is coupled into the CAP2
pin can be found in Application Note AN-1065. This is based
on the AD5410/AD5420 but can also be applied to the AD5412/
AD5422. Use of either configuration results in the AD5700 HART
modem output modulating the 4 mA to 20 mA analog current
without affecting the dc level of the current. This circuit adheres
to the HART physical layer specifications as defined by the
HART Communication Foundation.
The module is powered from a field supply of ±10.8 V to ±26.4 V.
This supplies AVDD/AVSS directly. For transient overvoltage
protection, transient voltage suppressors (TVS) are placed on
both the IOUT and field supply connections. A 24 V TVS is
placed on the IOUT connection, and a 36 V TVS is placed on the
field supply input(s). For added protection, clamping diodes are
connected from the IOUT pin to the AVDD and GND power
supply pins. A 10 kΩ current limiting resistor is also placed in
series with the positive terminal of the +VSENSE buffer input.
This is to limit the current to an acceptable level during a
transient event.
相關(guān)PDF資料
PDF描述
VE-B40-MV-F1 CONVERTER MOD DC/DC 5V 150W
VI-B4B-MW-F3 CONVERTER MOD DC/DC 95V 100W
VE-2NH-MW-F4 CONVERTER MOD DC/DC 52V 100W
VI-B4B-MW-F1 CONVERTER MOD DC/DC 95V 100W
AD7845JRZ IC DAC 12BIT MULT LC2MOS 24-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5422BREZ 功能描述:IC DAC 16BIT 1CH 24TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散(最大):- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-TSSOP,8-MSOP(0.118",3.00mm 寬) 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類(lèi)型:2 電壓,單極 采樣率(每秒):* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF)
AD5422BREZ-REEL 功能描述:IC DAC 16BIT 1CH SRL INP 24TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散(最大):55µW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類(lèi)型:1 電流,單極;1 電流,雙極 采樣率(每秒):*
AD5424 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface
AD5424_1 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface
AD5424BRU 制造商:Analog Devices 功能描述:DAC SGL R-2R 8BIT 16TSSOP - Bulk