參數(shù)資料
型號(hào): AD5424YRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/29頁(yè)
文件大小: 0K
描述: IC DAC 8BIT MULTIPLYING 16-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 96
設(shè)置時(shí)間: 30ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 25µW
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
輸出數(shù)目和類(lèi)型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 20.4M
產(chǎn)品目錄頁(yè)面: 782 (CN2011-ZH PDF)
配用: EVAL-AD5424EBZ-ND - BOARD EVALUATION FOR AD5424
AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 12 of 28
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
VOLTA
GE
(
m
V)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
VBIAS (V)
03160-022
GAIN ERROR
OFFSET ERROR
TA = 25°C
VREF = 2.5V
VDD = 3V AND 5V
Figure 21. Gain and Offset Errors vs. VBIAS Voltage Applied to IOUT2
–3
–2
–1
0
1
2
3
LSB
03160-023
VBIAS (V)
1.0
0.5
1.5
2.0
2.5
MAX INL
MAX DNL
MIN INL
MIN DNL
TA = 25°C
VREF = 0V
VDD = 5V
Figure 22. Linearity vs. VBIAS Voltage Applied to IOUT2, AD5445
–5
–4
–3
–2
–1
0
1
2
3
4
LSB
03160-024
VBIAS (V)
0.5
1.5
1.0
2.0
MAX INL
MAX DNL
MIN INL
MIN DNL
TA = 25°C
VREF = 2.5V
VDD = 5V
Figure 23. Linearity vs. VBIAS Voltage Applied to IOUT2, AD5445
0
1
2
3
4
5
CURRE
NT
(mA)
6
7
8
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VOLTAGE (V)
03160-025
VDD = 5V
VDD = 2.5V
VDD = 3V
Figure 24. Supply Current vs. Logic Input Voltage (Driving DB0 to DB11,
All Other Digital Inputs qt Supplies)
0
0.2
0.4
0.6
0.8
1.0
I OUT
LE
AKAGE
(nA)
1.2
1.4
1.6
40
20
–20
0
–40
60
80
100
120
TEMPERATURE (°C)
03160-026
IOUT1 VDD 5V
IOUT1 VDD 3V
Figure 25. IOUT1 Leakage Current vs. Temperature
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
CURRE
NT
(
A)
–60
–40
–20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
03160-027
VDD = 5V
ALL 0s
ALL 1s
ALL 0s
ALL 1s
VDD = 2.5V
Figure 26. Supply Current vs. Temperature
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