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參數(shù)資料
| 型號： | AD5535ABCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CHAN 124CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 65µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 594mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 124-LBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 124-CSPBGA（15x15） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 32 電壓，單極 |
| 采樣率（每秒）： | 1.2M |
| 配用： | EVAL-AD5535EBZ-ND - BOARD EVALUATION FOR AD5535 |
AD5535
Rev. A | Page 11 of 16
TERMINOLOGY
Integral Nonlinearity (INL)
A measure of the maximum deviation from a straight line
passing through the endpoints of the DAC transfer function.
It is expressed as a percentage of full-scale range.
Differential Nonlinearity (DNL)
The difference between the measured change and the ideal
1 LSB change between any two adjacent codes. A specified
DNL of ±1 LSB maximum ensures monotonicity.
Zero-Code Voltage
A measure of the output voltage present at the device output
with all 0s loaded to the DAC. It includes the offset of the
DAC and the output amplifier and is expressed in V.
Offset Error
Calculated by taking two points in the linear region of the
transfer function, drawing a line through these points, and
extrapolating back to the y-axis. It is expressed in V.
Voltage Gain
Calculated from the change in output voltage for a change in
code, multiplied by 16,384, and divided by the REF_IN voltage.
This is calculated between two points in the linear section of the
transfer function.
Gain Error
A measure of the output error with all 1s loaded to the DAC,
and the difference between the ideal and actual analog output
range. Ideally, the output should be 50 × REF_IN. It is expressed
as a percentage of full-scale range.
DC Power Supply Rejection Ratio (PSRR)
A measure of the change in analog output for a change in VPP
supply voltage. It is expressed in dB, and VPP is varied ±5%.
DC Crosstalk
The dc change in the output level of one DAC at midscale in
response to a full-scale code change (all 0s to all 1s and vice
versa) and the output change of all other DACs. It is expressed
in LSB.
Output Voltage Settling Time
The time taken from when the last data bit is clocked into the
DAC until the output has settled to within ±0.5 LSB of its final
value. Measured for a step change of to full scale.
Digital-to-Analog Glitch Impulse
The area of the glitch injected into the analog output when
the code in the DAC register changes state. It is specified as
the area of the glitch in nV-s when the digital code is changed
by 1 LSB at the major carry transition (011 . . . 11 to 100 . . . 00
or 100 . . . 00 to 011 . . . 11).
Analog Crosstalk
The area of the glitch transferred to the output (VOUT) of one
DAC due to a full-scale change in the output (VOUT) of another
DAC. The area of the glitch is expressed in nV-s.
Digital Feedthrough
A measure of the impulse injected into the analog outputs from
the digital control inputs when the part is not being written to
(SYNC is high). It is specified in nV-s and measured with a
worst-case change on the digital input pins, for example, from
all 0s to all 1s and vice versa.
Output Noise Spectral Density
A measure of internally generated random noise. Random noise
is characterized as a spectral density (voltage per √Hz). It is
measured by loading all DACs to midscale and measuring noise
at the output. It is measured in nV/
√Hz.
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| AD5535B | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V |
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