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參數(shù)資料
| 型號(hào)： | AD5544BCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SER QUAD 32-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 設(shè)置時(shí)間： | 900ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 1.25mW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
Data Sheet
AD5544/AD5554
Rev. G | Page 13 of 24
THEORY OF OPERATION
The AD5544 and the AD5554 contain four 16-bit and 14-bit,
current output DACs, respectively. Each DAC has its own inde-
pendent multiplying reference input. Both the AD5544 and the
AD5554 use a 3-wire, SPI-compatible serial data interface, with
a configurable asynchronous RS pin for half-scale (MSB = 1) or
zero-scale (MSB = 0) preset. In addition, an LDAC strobe enables
4-channel, simultaneous updates for hardware synchronized
output voltage changes.
DIGITAL-TO-ANALOG CONVERTER (DAC)
Each part contains four current-steering R-R ladder DACs.
Figure 20 shows a typical equivalent DAC. Each DAC contains
a matching feedback resistor for use with an external I-to-V
converter amplifier. The RFBx pin connects to the output of the
external amplifier. The IOUTx terminal connects to the inverting
input of the external amplifier. The AGNDx pin should be Kelvin-
connected to the load point, requiring full 16-bit accuracy. These
DACs are designed to operate with both negative and positive
reference voltage.
The VDD power pin is used only by the logic to drive the DAC
switches on and off. Note that a matching switch is used in series
with the internal 5 kΩ feedback resistor. If users attempt to
measure the value of RFB, power must be applied to VDD to achieve
continuity. An additional VSS bias pin is used to guard the substrate
during high temperature applications, minimizing zero-scale
leakage currents that double every 10°C. The DAC output
voltage is determined by VREF and the digital data (D) in the
following equations:
5544
AD
the
for
536
,
65
D
V
REF
OUT
(1)
5554
AD
the
for
384
,
16
D
V
REF
OUT
(2)
Note that the output polarity is opposite the VREF polarity for dc
reference voltages.
VREFX
VSS
DGND
VDD
RFBX
IOUTX
AGNDF
AGNDX
RR
R
2R
5k
S1
S2
FROM OTHER DACS AGND
R
00
94
3-
02
5
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY.
SWITCHES S1 AND S2 ARE CLOSED, AND VDD MUST BE POWERED.
Figure 20. Typical Equivalent DAC Channel
These DACs are also designed to accommodate ac reference input
signals. Both the AD5544 and the AD5554 accommodate input
reference voltages in the range of 15 V to +15 V. The reference
voltage inputs exhibit a constant nominal input resistance of 5 kΩ ±
30%. On the other hand, the IOUTA, IOUTB, IOUTC, and IOUTD
DAC outputs are code dependent and produce various output
resistances and capacitances. The choice of external amplifier
should take into account the variation in impedance generated by
The feedback resistance, in parallel with the DAC ladder resistance,
dominates output voltage noise. For multiplying mode applications,
an external feedback compensation capacitor, CFB, may be needed
to provide a critically damped output response for step changes in
reference input voltages. Figure 21 shows the gain vs. frequency
performance at various attenuation settings using a 23 pF external
feedback capacitor connected across the IOUTx and RFBx terminals
for the AD5544 and the AD5554, respectively. To maintain good
analog performance, power supply bypassing of 0.01 μF, in parallel
with 1 μF, is recommended. Under these conditions, a clean power
supply with low ripple voltage capability should be used. Switching
power supplies is usually not suitable for this application due to
the higher ripple voltage and PSS frequency-dependent charac-
from system analog supply voltages. Do not use the digital
supply (see Figure 22).
00
943
-026
FREQUENCY (Hz)
GA
IN
(
d
B
)
2
0
–2
–4
–6
–8
100k
1M
10M
100M
Figure 21. AD5554 Reference Multiplying Bandwidth vs. Code
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