參數(shù)資料
型號： AD5560JSVUZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 21/68頁
文件大?。?/td> 0K
描述： IC DPS PROGRAMABLE W/DAC 64TQFP
設(shè)計資源： Integrated Device Power Supply for PAD with Output Voltage Range 0 V to 25 V (CN0130)
標準包裝： 1,500
類型： 電源
應(yīng)用： 自動測試設(shè)備
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-TQFP-EP（10x10）
包裝： 帶卷 (TR)
AD5560
Data Sheet
Rev. D | Page 28 of 68
TERMINOLOGY
Offset Error
Offset error is a measure of the difference between the actual
voltage and the ideal voltage at midscale or at zero current
expressed in millivolts (mV) or percentage of full-scale range
(%FSR).
Gain Error
Gain error is the difference between full-scale error and zero-
scale error. It is expressed in percentage of full-scale range
(%FSR).
Gain Error = Full-Scale Error Zero-Scale Error
where:
Full-Scale Error is the difference between the actual voltage and
the ideal voltage at full scale.
Zero-Scale Error is the difference between the actual voltage and
the ideal voltage at zero scale.
Linearity Error
Linearity error, or endpoint linearity, is a measure of the
maximum deviation from a straight line passing through the
endpoints of the full-scale range. It is measured after adjusting
for offset error and gain error and is expressed in millivolts (mV).
Common-Mode (CM) Error
CM error is the error at the output of the amplifier due to the
common-mode input voltage. It is expressed in percentage of
full-scale voltage range per volt (%FSVR/V).
Clamp Limit
Clamp limit is a measure of where the clamps begin to function
fully and limit the clamped voltage or current.
Leakage Current
Leakage current is the current measured at an output pin when
the circuit connected to that pin is in high impedance state.
Slew Rate
The slew rate is the rate of change of the output voltage
expressed in volts per microsecond (V/μs).
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
DNL of ±1 LSB maximum ensures monotonicity.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for
the output of a DAC to settle to a specified level for a full-scale
input change.
Digital-to-Analog Glitch Energy
Digital-to-analog glitch energy is the amount of energy that is
injected into the analog output at the major code transition. It
is specified as the area of the glitch in nanovolts per second
(nV-sec). It is measured by toggling the DAC register data
between 0x7FFF and 0x8000.
AC Power Supply Rejection Ratio (ACPSRR)
ACPSRR is a measure of the part’s ability to avoid coupling
noise and spurious signals that appear on the supply voltage
pin to the output of the switch. The dc voltage on the device
is modulated by a sine wave of 0.2 V p-p. The ratio of the
amplitude of the signal on the output to the amplitude of the
modulation is the ACPSRR. It is expressed in decibels (dB).
VSTRESS
VSTRESS is the stress voltage applied to each pin during leakage
testing.
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