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參數(shù)資料
| 型號： | AD5570YRS-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SERIAL IN 16SSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 500 |
| 設置時間： | 12µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 150mW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 83k |
AD5570
Rev. C | Page 19 of 24
APPLICATIONS INFORMATION
TYPICAL OPERATING CIRCUIT
Figure 39 shows the typical operating circuit for the AD5570.
The only external component needed for this precision 16-bit
DAC is a single external positive reference. Because the device
incorporates reference buffers, it eliminates the need for a negative
reference, external inverters, precision amplifiers, and resistors.
This leads to an overall savings of both cost and board space.
to ±15 V, but VDD and VSS can operate supplies from 11.4 V to
16.5 V. AGNDS is connected to AGND, but the option of force/
sense is included on this device if required by the user.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD5570
VSS
VDD
CLR
LDAC
SYNC
SCLK
SDIN
SDO
REFGND
REFIN
REFGND
VOUT
AGNDS
AGND
PD
DGND
+15V
0.1F
10F
0.1F
10F
–15V
VOUT
5V
ADR435
LDAC
SYNC
SCLK
SDIN
SDO
5k
0
3760-
044
Figure 39. Typical Operating Circuit
Force/Sense of AGND
Because of the extremely high accuracy of this device, system
design issues (such as grounding and contact resistance) are
very important. The AD5570, with ±10 V output, has an LSB
size of 305 μV. Therefore, series wiring and connector resistances
of very small values can cause voltage drops of an LSB. For this
reason, the AD5570 offers a force/sense output configuration.
Figure 40 shows how to connect the AD5570 to the force/sense
amplifier. Where accuracy of the output is important, an ampli-
fier such as the OP177 is ideal. The OP177 is ultraprecise with
offset voltages of 10 μV maximum at room temperature, and off-
set drift of 0.1 μV/°C maximum. Alternative recommended
amplifiers are the OP1177 and the OP77. For applications where
optimization of the circuit for settling time is needed, the AD845
is recommended.
Precision Voltage Reference Selection
To achieve the optimum performance from the AD5570, give
special attention to the selection of a precision voltage reference.
The AD5570 has just one reference input, REFIN. This voltage
on REFIN is used to provide a buffered positive and negative
reference for the DAC core. Therefore, any error in the voltage
reference is reflected in the output of the device.
6
2
3
(OTHER CONNECTIONS OMITTED
FOR CLARITY)
OP177*
*FOR OPTIMUM SETTLING TIME PERFORMANCE,
THE AD845 IS RECOMMENDED.
03760-045
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD5570
VSS
VDD
CLR
LDAC
SYNC
SCLK
SDIN
SDO
REFGND
REFIN
REFGND
VOUT
AGNDS
AGND
PD
DGND
Figure 40. Driving AGND and AGNDS Using a Force/Sense Amplifier
The four possible sources of error to consider when choosing
a voltage reference for high accuracy applications are initial
accuracy, long-term drift, temperature coefficient of the out-
put voltage, and output voltage noise.
Initial accuracy on the output voltage of an external reference can
lead to a full-scale error in the DAC. Therefore, to minimize
these errors, a reference with low initial accuracy specification
is preferred. Also, choosing a reference with an output trim adjust-
ment, such as the ADR425, allows a system designer to trim out
system errors by setting the reference voltage to a voltage other
than the nominal. The trim adjustment can also be used at tem-
perature to trim out any error.
Long-term drift (LTD) is a measure of how much the reference
drifts over time. A reference with a tight long-term drift specifica-
tion ensures that the overall solution remains relatively stable
over its entire lifetime.
The temperature coefficient of a references output voltage
affects INL, DNL, and TUE. Choose a reference with a tight
temperature coefficient specification to reduce the depend
ence of the DAC output voltage on ambient conditions.
In high accuracy applications that have a relatively low noise
budget, reference output voltage noise needs to be considered.
It is important to choose a reference with as low an output noise
voltage as practical for the system resolution required. Precision
voltage references, such as the ADR435 (XFET design), produce
low output noise in the 0.1 Hz to 10 Hz region. However, as the
circuit bandwidth increases, filtering the output of the reference
can be required to minimize the output noise.
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| AD5570YRSZ | 功能描述:IC DAC 16BIT SERIAL IN 16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1,000 系列:- 設置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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