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參數(shù)資料
| 型號(hào)： | AD5570YRS-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SERIAL IN 16SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 設(shè)置時(shí)間： | 12µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 150mW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 83k |
AD5570
Rev. C | Page 20 of 24
Table 8. Partial List of Precision References Recommended
for Use with the AD5570
Part No.
Initial
Accuracy
(mV max)
Long-Term
Drift
(ppm typ)
Temp Drift
(ppm/
°C max)
0.1 Hz to
10 Hz Noise
(μV p-p typ)
ADR435
±6
30
3
3.4
ADR425
±6
50
3
3.4
±5
50
3
15
ADR395
±6
50
25
5
AD586
±2.5
15
10
4
1 Available in SC70 package.
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board that
the AD5570 is mounted on is designed so the analog and dig-
ital sections are separated and confined to certain areas of the
board. If the AD5570 is in a system where multiple devices
require an AGND-to-DGND connection, the connection is
made at one point only. The star ground point is established
as close as possible to the device.
The AD5570 has ample supply bypassing of 10 μF in parallel
with 0.1 μF on each supply located as close to the package as
possible, ideally right up against the device. The 10 μF capacitors
are the tantalum bead type. The 0.1 μF capacitor has low effective
series resistance (ESR) and effective series inductance (ESI)
such as the common ceramic types that provide a low imped-
ance path to ground at high frequencies to handle transient
currents due to internal logic switching.
The power supply lines of the AD5570 use as large a trace as pos-
sible to provide low impedance paths and reduce the effects of
glitches on the power supply line. Fast switching signals such as
clocks are shielded with digital ground to avoid radiating noise
to other parts of the board, and are never be run near the refer-
ence inputs. A ground line routed between the SDIN and SCLK
lines reduces crosstalk between them; this is not required on a
multilayer board that has a separate ground plane, but separating
the lines helps. It is essential to minimize noise on the REFIN
line because it couples through to the DAC output.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board must run at right angles to each other.
This reduces the effects of feed through the board. A micro-
strip technique is by far the best, but not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to ground plane, while signal
traces are placed on the solder side.
OPTO-ISOLATORS
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators provide voltage isolation in excess of
3 kV. The serial loading structure of the AD5570 makes it ideal
for opto-isolated interfaces, because the number of interface lines
is kept to a minimum. Figure 41 shows a 4-channel isolated inter-
face to the AD5570. To reduce the number of opto-isolators, the
LDAC pin can be tied permanently low if the simultaneous
updating of the DAC is not required. The DAC can then be
updated on the rising edge of SYNC.
VCC
TO SDIN
TO SCLK
TO SYNC
SYNC OUT
SERIAL CLOCK OUT
SERIAL DATA OUT
CONTROLLER
OPTO-COUPLER
TO LDAC
CONTROL OUT
03
76
0-
05
0
Figure 41. Opto-Isolated Interface
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