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參數(shù)資料
型號: AD5735ACPZ
廠商: Analog Devices Inc
文件頁數(shù): 41/48頁
文件大?。?/td> 0K
描述: IC DAC QUAD VOLT CUR 64-LFCSP
標準包裝: 1
設(shè)置時間: 18µs
位數(shù): 12
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
輸出數(shù)目和類型: 4 電流,4 電壓
采樣率(每秒): *
AD5735
Data Sheet
Rev. C | Page 46 of 48
DRIVING INDUCTIVE LOADS
When driving inductive or poorly defined loads, a capacitor
may be required between the IOUT_x pin and the AGND pin to
ensure stability. A 0.01 F capacitor between IOUT_x and AGND
ensures stability of a load of 50 mH. The capacitive component
of the load may cause slower settling, although this may be
masked by the settling time of the AD5735. There is no maxi-
mum capacitance limit for the current output of the AD5735.
TRANSIENT VOLTAGE PROTECTION
The AD5735 contains ESD protection diodes that prevent dam-
age from normal handling. The industrial control environment
can, however, subject I/O circuits to much higher transients. To
protect the AD5735 from excessively high voltage transients,
external power diodes and a surge current limiting resistor (RP)
are required, as shown in Figure 83. A typical value for RP is 10 .
The two protection diodes and the resistor (RP) must have appro-
priate power ratings.
RLOAD
R
D1
D2
AVSS
P
AD5735
VBOOST_x
IOUT_x
AGND
09961-
079
CDCDC
4.7F
CFILTER
0.1F
RFILTER
10
(FROM
DC-TO-DC
CONVERTER)
Figure 83. Output Transient Voltage Protection
Further protection can be provided using transient voltage
suppressors (TVSs), also referred to as transorbs. These compo-
nents are available as unidirectional suppressors, which protect
against positive high voltage transients, and as bidirectional
suppressors, which protect against both positive and negative
high voltage transients. Transient voltage suppressors are avail-
able in a wide range of standoff and breakdown voltage ratings.
The TVS should be sized with the lowest breakdown voltage
possible while not conducting in the functional range of the
current output.
It is recommended that all field connected nodes be protected.
The voltage output node can be protected with a similar circuit,
where D2 and the transorb are connected to AVSS. For the volt-
age output node, the +VSENSE_x pin should also be protected with
a large value series resistance to the transorb, such as 5 k. In
this way, the IOUT_x and VOUT_x pins can also be tied together and
share the same protection circuitry.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5735 is via a serial bus
that uses a protocol compatible with microcontrollers and DSP
processors. The communication channel is a 3-wire minimum
interface consisting of a clock signal, a data signal, and a latch
signal. The AD5735 requires a 24-bit data-word with data valid
on the falling edge of SCLK.
The DAC output update is initiated either on the rising edge of
LDAC or, if LDAC is held low, on the rising edge of SYNC. The
contents of the registers can be read using the readback function.
AD5735-to-ADSP-BF527 Interface
The AD5735 can be connected directly to the SPORT interface
of the ADSP-BF527, an Analog Devices, Inc., Blackfin DSP.
Figure 84 shows how the SPORT interface can be connected
to control the AD5735.
AD5735
SYNC
SCLK
SDIN
LDAC
SPORT_TFS
SPORT_TSCLK
SPORT_DT0
GPIO0
ADSP-BF527
09961-
080
Figure 84. AD5735-to-ADSP-BF527 SPORT Interface
LAYOUT GUIDELINES
Grounding
In any circuit where accuracy is important, careful consider-
ation of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5735 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the AD5735 is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
The GNDSWx pin and the ground connection for the AVCC
supply are referred to as PGND. PGND should be confined to
certain areas of the board, and the PGND-to-AGND connection
should be made at one point only.
Supply Decoupling
The AD5735 should have ample supply bypassing of 10 F in
parallel with 0.1 F on each supply, located as close to the package
as possible, ideally right up against the device. The 10 F capac-
itors are the tantalum bead type. The 0.1 F capacitors should
have low effective series resistance (ESR) and low effective series
inductance (ESL), such as the common ceramic types, which
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching.
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