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參數(shù)資料
| 型號： | AD6121ARSRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, DSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 258K |
| 代理商： | AD6121ARSRL |
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD6121
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
CDMA 3 V Receiver IF Subsystem
with Integrated Voltage Regulator
FUNCTIONAL BLOCK DIAGRAM
2
I
Q
ROOFING
FILTER
IF
OUTPUT
DEMODULATOR
INPUT
IF AMPLIFIERS
INPUT STAGE
QUADRATURE DEMODULATOR
CDMA
INPUT
FM
INPUT
CDMA/FM
SELECT
GAIN
CONTROL
VOLTAGE
INPUT
1.23V
REFERENCE
OUTPUT
GAIN
CONTROL
VOLTAGE
REFERENCE
INPUT
POWER-
DOWN 2
POWER-
DOWN 1
IOUT
IOUT
QOUT
QOUT
LOCAL
OSCILLATOR
INPUT
VPOS
VREG
LOW
DROPOUT
REGULATOR
GAIN CONTROL
SCALE FACTOR
PTAT
TEMPERATURE
COMPENSATION
AD6121
FEATURES
Fully Compliant with IS98A and PCS Specifications
CDMA, W-CDMA, AMPS, and TACS Operation
Linear IF Amplifier
5.9 dB Noise Figure
–47.5 dB to +47 dB Linear-in-dB Gain Control
Quadrature Demodulator
Demodulates IFs from 50 MHz to 350 MHz
Integral Low Dropout Regulator
200 mV Voltage Drop
Accepts 2.9 V to 4.2 V Input from Battery
Low Power
10 mA at Midgain
<1 A Sleep Mode Operation
Companion Transmitter IF Chip Available (AD6122)
APPLICATIONS
CDMA, W-CDMA, AMPS, and TACS Operation
QPSK Receivers
GENERAL DESCRIPTION
The AD6121 is a low power receiver IF subsystem specifically
designed for CDMA applications. It consists of high dynamic
range IF amplifiers with voltage controlled gain, a divide-by-two
quadrature generator, an I and Q demodulator, and a power-
down control input. An integral low dropout regulator allows
operation from battery voltages from 2.9 V to 4.2 V.
The gain control input accepts an external gain control voltage
input from a DAC. It provides 94.5 dB of gain control with a
nominal 52.5 dB/V scale factor when using an internal voltage
reference. The gain control interface reference input can be
connected to either the internal reference or an external reference.
The I and Q demodulator provides differential quadrature base-
band outputs to interface with CDMA baseband converters. A
divide-by-two quadrature generator followed by dual polyphase
filters ensures maximum
±
2.5
°
quadrature accuracy.
The AD6121 IF Subsystem is fabricated using a 25 GHz f
t
BiCMOS silicon process and is packaged in a 28-lead SSOP
and a 32-leadless LPCC chip scale package (5 mm
×
5 mm).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD6121ACP | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| AD6121ARS | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| AD6121 | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| AD6121ACPRL | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| AD6122ARSRL | CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6122 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ACP | 制造商:Analog Devices 功能描述:COMMUNICATION CDMA 3V TRANSMITTER IF SUBSYSTEM 28SSOP |
| AD6122ACPRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARS | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARSRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
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