參數(shù)資料
型號: AD6121ARSRL
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator
中文描述: SPECIALTY TELECOM CIRCUIT, DSO28
封裝: SSOP-28
文件頁數(shù): 10/16頁
文件大?。?/td> 258K
代理商: AD6121ARSRL
AD6121
–10–
REV. B
X-AMP is a trademark of Analog Devices, Inc.
THEORY OF OPERATION
The AD6121 consists of high dynamic range IF amplifiers with
voltage controlled gain, a divide-by-two quadrature generator,
an I and Q demodulator, a low dropout regulator and power-
down control inputs (Figure 27).
The AD6121 accommodates both the desired CDMA signal
and an interferer 42 dB larger—approximately 6 mV p-p for the
desired signal and 700 mV p-p for the interferer—as specified in
the CDMA system.
IF Amplifiers and Gain Control
The IF gain is provided by two sections: a CDMA or FM input
stage followed by three cascaded IF amplifiers. The CDMA and
FM input stages use differential, continuously-variable attenua-
tors based on Analog Devices’ patented X-AMP topology.
These low noise attenuators consist of a differential R-2R ladder
network, linear interpolator, and a fixed gain amplifier. The
bulk of the IF gain is provided by three cascaded, wideband
2
I
Q
ROOFING
FILTER
IF
OUTPUT
DEMODULATOR
INPUT
IF AMPLIFIERS
INPUT STAGE
QUADRATURE DEMODULATOR
CDMA
INPUT
FM
INPUT
CDMA/FM
SELECT
GAIN
CONTROL
VOLTAGE
INPUT
1.23V
REFERENCE
OUTPUT
GAIN
CONTROL
VOLTAGE
REFERENCE
INPUT
POWER-
DOWN 2
POWER-
DOWN 1
IOUT
IOUT
QOUT
QOUT
LOCAL
OSCILLATOR
INPUT
VPOS
VREG
LOW
DROPOUT
REGULATOR
GAIN CONTROL
SCALE FACTOR
PTAT
TEMPERATURE
COMPENSATION
AD6121
Figure 27. Functional Block Diagram
VGAIN
Volts
16
0.5
2.5
1
C
1.5
2
8
10
4
14
T
A
=
40 C
T
A
= +25 C
6
12
2
0
T
A
= +85 C
Figure 26. Current Consumption vs. VGAIN, T
A
= –40
°
C,
+25
°
C and +85
°
C
amplifiers. The gain and input bandwidth of the AD6121 are
identical for both the FM and CDMA operating modes. When
the CDMA/FM pin is high, CDMA mode is enabled. When the
pin is low, FM mode is enabled.
The IF amplifiers operate in two different configurations, one
with the I and Q demodulator powered up and another with the
I and Q demodulator powered down. The I and Q demodulator
power setting is configured with pin PD2. The power-down
control is further discussed in the section of this data sheet
entitled Power-Down Control.
When the demodulator is powered up, the outputs of the IF
amplifiers are internally dc-biased and there is no need for exter-
nal pull-up inductors. A roofing filter is required (see section
entitled Roofing Filter in this data sheet) when using the IF
amplifiers with the I and Q demodulator powered up. Under
these conditions, the IF amplifiers and the low noise attenuator
input stage has +41.4 dB of gain.
When the I and Q demodulator is powered down, the IF ampli-
fiers have open collector outputs resulting in the need for pull-
up inductors. Under this configuration, and with the output of
the IF amplifiers loaded with 1 k
, the gain of the IF amplifiers
and low noise attenuator input stage is +47 dB. The pull-up
inductors should be chosen so that the parasitic capacitance
seen at the output of the IF amplifiers is resonated at the fre-
quency of interest. Figure 28 shows how to configure the pull-up
inductors at the output of the IF amplifiers. The 10 nF capaci-
tors are used for ac coupling.
In order to resonate the parasitic capacitors, rearrange Equation
1 to solve for L.
f
LC
PAR
0
1
2
=
π
(1)
where
f
0
is the IF frequency in Hertz,
C
PAR
is the total parasitic
capacitance in Farads, and
L
is the total shunt inductor value in
henrys.
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