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參數(shù)資料
| 型號： | AD6121ARSRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, DSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 258K |
| 代理商： | AD6121ARSRL |
AD6121
–14–
REV. B
the header labeled PD2. As described in Table I of this data
sheet, it is invalid to have PD1 open circuited and PD2 short
circuited. In order to power down the IF amplifiers and de-
modulator, open circuit both PD1 and PD2.
As shipped, the board is configured as follows:
1. J1 is open circuited and J2 is short circuited. This enables the
LDO regulator. In order to bypass the LDO regulator, short
circuit J1 and open circuit J2.
2. X18, X26, X25 and X23 are short circuited resulting in
the IF amplifiers
’
output being connected to the I and Q
demodulator
’
s input.
3. L4, the roofing filter inductor is optimized for an IF fre-
quency of 85.38 MHz.
4. L2 and L3 are open circuited, although the components are
soldered on one pad of each set of solder pads.
In order to evaluate the IF amplifiers and I and Q demodulator
independent of each other, the roofing filter will have to be
removed from the circuit and the pull up inductors will have to
be added at the output of the IF amplifiers. When evaluating the
IF amplifiers alone, the I and Q demodulator should be pow-
ered down as described earlier in this section. The 470 nH pull
up inductors required for the 85.38 MHz IF frequency are
provided with the board, however, they will need to be soldered
down to pads L2 and L3. The roofing filter should be discon-
nected from the circuit and the output ports for the IF ampli-
fiers as well as the input ports for the I and Q demodulator
should be connected. This is accomplished by open circuiting
X18, X25, X26 and X33 and short circuiting X19, X21, X27
and X29.
Table II describes the high frequency signal connectors on the
AD6121 customer sample board.
Table II. Evaluation Board SMA Signal Connector Descriptions
Connector
LOIPP
FMIP
Description
Local oscillator positive input at 2
×
IF frequency
FM signal input port. The differential to single
ended conversion performed on board by a balun.
Impedance matched to 50
for a 85.38 MHz IF
frequency.
CDMA signal input port. The differential to single
ended conversion performed on board by a balun.
Impedance matched to 50
for a 85.38 MHz IF
frequency.
IF Amplifier output port. The differential to single
ended conversion performed on board by a balun.
Impedance matched to 50
for a 85.38 MHz IF
frequency.
Demodulator input port. The differential to single
ended conversion performed on board by a balun.
Impedance matched to 50
for a 85.38 MHz IF
frequency.
I channel output port for the I and Q demodulator.
Q channel output port for the I and
Q demodulator
CDMAIP
IF OUT
DMOD IN
I CH
Q CH
Table III lists the connections for the 20-pin power supply
connector.
Table III. 20-Pin Power Supply Connection Information
Pin
Number
Function
1
VPOS for AD6121.
2.9 V
–
4.2 V using the LDO Regulator.
2.7 V
–
4.2 V bypassing the LDO Regulator.
VPOS for AD6121.
2.9 V
–
4.2 V using the LDO Regulator.
2.7 V
–
4.2 V bypassing the LDO Regulator.
Ground.
Ground.
Ground.
Ground.
Ground.
PD1. Connects to 2-pin header labeled PD1.
Ground.
PD2. Connects to 2-pin header labeled PD2.
Ground.
FM/CDMA. Selects FM or CDMA mode.
Connected to 2-pin header labeled FM/CDMA.
Ground.
REFOUT. 1.23 V output reference voltage from
Pin 18 on AD6121.
Ground.
VGAIN. Gain control voltage input. Connected to
Pin 16 on AD6121.
Ground.
V
REGOUT
. The 2.7 V output of the LDO regulator
when it is enabled. Connects to Pin 12 on AD6121.
–
15 V for AD830 Amplifier.
+15 V for AD830 Amplifier.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A schematic diagram of the evaluation board is shown in
Figure 37.
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| AD6121ACP | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
| AD6121ARS | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
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| AD6121ACPRL | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6122 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ACP | 制造商:Analog Devices 功能描述:COMMUNICATION CDMA 3V TRANSMITTER IF SUBSYSTEM 28SSOP |
| AD6122ACPRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARS | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARSRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
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