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參數(shù)資料
| 型號(hào)： | AD6426 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Enhanced GSM Processor |
| 中文描述： | 增強(qiáng)型手機(jī)處理器 |
| 文件頁數(shù)： | 22/50頁 |
| 文件大小： | 506K |
| 代理商： | AD6426 |
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Preliminary Technical Information
AD6426
This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no
obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Analog Devices.
Revision Preliminary 2.3 (June 9, ′98)
- 22 -
Confidential Information
Radio Interface
The AD6426 Radio Interface has been designed to support
direct connection to the ADI IF-Chips AD6432, while
providing full backwards compatibility to existing radio
designs interfacing to the AD20msp410 and AD20msp415.
Additionally the AD6426 Radio Interface supports radio
architectures based on Siemens, TTP/Hitachi or Philips RF
chipsets.
The Radio Interface of the AD6426 consists of 16 dedicated
output pins listed in Table 13. Together with two optional
general purpose I/O-pins they provide a flexible interface to a
variety of radio architectures for both 900 MHz and 1800/1900
MHz operation.
Dual Band Control
To support dual band handsets BANDSELECT[1:0] signals
are provided. BANDSELECT0 is multiplexed with GPIO[2],
with the default function of this being GPIO[2].
BANDSELECT1 is multiplexed with GPIO[1], the default
function being GPIO[1].
For Dual Band solutions requiring a single band select bit, the
BANDSELECT0 function is enabled by asserting the BAND
EN bit. In order to set BANDSELECT0 high/low and cause
the radio module to operate in the appropriate band, the least
significant bit (bit 0) of the relevant 32 bit register for
Dynamic Synthesizer 1 must be written, i.e. different values
may be set for Rx, Tx and Monitor but only for Dynamic
Synthesizer 1.
BANDSELECT0 is sampled internally and is valid from the
beginning of data serialization, both for on demand
(immediate) loading and ordinary interrupt driven loading.
The BANDSELECT0 signal will remain in this known state
until the next time there is any serialization of data for
Dynamic Synthesizer 1, when a new sample will be taken of
the least significant bit of the 32 bit synthesizer register
currently being serialized.
Full control is provided over the number of bits to be shifted
out to the synthesizer and so it is intended that this bit count
will always be less than 32 when using the BANDSELECT0
feature in order to prevent shifting the control bit out.
BANDSELECT0 is gated with RADIO POWER CONTROL to
ensure that whenever the RADIO is off, BANDSELECT0 is
forced to a low state.
For Dual Band Solution requiring two band select bits, one for
GSM900, and one for DCS1800, then both BANDSELECT0
and BANDSELECT1 are enabled by asserting both the BAND
EN and DCSSEL EN bits. The BANDSELECT0 output is
driven as in the single enable mode (described above), and the
BANDSELECT1 output is the inverted output of the raw
BANDSELECT0 output (prior to gating with RADIO POWER
CONTROL), gated with RADIO POWER CONTROL to force
a low output when the Radio is off.
In order to increase the flexibility of the AD6426, three pins in
the Radio Interface are multiplexed with GPO functions. The
pins multiplexed are: SYTHEN1, AGCA and AGCB, with the
default function being the Radio Interface.
The mode of these pins is controlled by the new ccGPO
Channel Codec Register:
The GPO[n]Sel bit selects the function of the pin. Setting
GPO[n]Sel to one will enable the pin to be controlled by the
GPO[n] bit. The GPO[n]Sel bit will override any other pin
function selection.
Generic Pins
The following three pins have the same functionality in all
types of radio architectures:
RADIOPWRCTL
This output signal is typically used to power down the
oscillators and prescalers during Idle mode and is directly
controlled by the
Radio Power Control
flag in the POWER
CONTROL EXTERNAL CC Control Register 45.
Bit
POWER CONTROL EXTERNAL CC Control
Register 45
1
Radio Power Control
Table 13. Radio Interface
Name
I/O
Function
GPIO1
O
BANDSELECT1
GPIO2
O
BANDSELECT0
RADIOPWRCTL
GPIO6
GPIO7
O
O
O
Radio Powerdown Control
VBIAS
ANTENNASELECT
TXPHASE
TXENABLE
TXPA
RXON
CALIBRATERADIO
O
O
O
O
O
Switches PLLs (Rx / Tx)
Transmit Enable
Power Amplifier Enable
Receiver on
Radio Calibration
SYNTHEN0
SYNTHEN1
SYNTHDATA
SYNTHCLK
O
O
O
O
Synthesizer 0 Enable
Synthesizer 1 Enable
Synthesizer Port Serial Data
Synthesizer Port Clock
AGCA
AGCB
O
O
AGC Control A
AGC Control B
相關(guān)PDF資料 |
PDF描述 |
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| AD6426XB | DIODE, RECTIFIER, DO-201AD, AXIAL LEAD, STANDARD RECOVERY, 400 V, 3 A |
| AD6426XST | 1N5817 DIODE SCHOTTKY 20V 1A DO-41 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD6426XB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Enhanced GSM Processor |
| AD6426XST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Enhanced GSM Processor |
| AD642J | 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision, Low Cost Dual BiFET Op Amp |
| AD642JH | 制造商:Rochester Electronics LLC 功能描述:PRECISION DUAL OP AMP IC - Bulk |
| AD642K | 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision, Low Cost Dual BiFET Op Amp |
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