+VCC = 15 V, V
參數(shù)資料
型號: AD660BRZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 16/20頁
文件大?。?/td> 0K
描述: IC DAC 16BIT MONO W/VREF 24-SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,000
系列: DACPORT®
設(shè)置時間: 6µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 625mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設(shè)備封裝: 24-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 167k
AD660
Rev. B | Page 5 of 20
TIMING CHARACTERISTICS
+VCC = 15 V, VEE = 15 V, +VLL = 5 V, VHIGH = 2.4 V, VLOW = 0.4 V.
Table 3.
Parameter
Limit at TA = 25°C
Limit at TA = 55°C to +125°C
Unit
BYTE LOAD (see Figure 2)
t
CS
40
50
ns min
tDS
40
50
ns min
tDH
0
10
ns min
t
BES
40
50
ns min
t
BEH
0
10
ns min
tLH
80
100
ns min
tLW
40
50
ns min
SERIAL LOAD (see Figure 3)
tCLK
80
100
ns min
tLOW
30
50
ns min
tHIGH
30
50
ns min
tSS
0
10
ns min
tDS
40
50
ns min
tDH
0
10
ns min
tSH
0
10
ns min
tLH
80
100
ns min
tLW
40
50
ns min
ASYNCHRONOUS CLEAR TO BIPOLAR
OR UNIPOLAR ZERO (see Figure 4)
t
CLR
80
110
ns min
tSET
80
110
ns min
tHOLD
0
10
ns min
SERIAL OUT (see Figure 5)
tPROP
50
100
ns min
tDS
50
80
ns min
tDS
tDH
tLH
tLW
tBEH
tBES
tCS
DB0 TO DB7
HBE OR LBE
CS
LDAC
01
81
3-
00
2
Figure 2. AD660 Byte Load Timing
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