參數(shù)資料
型號(hào)： AD6624
英文描述： LTC1799, LTC6900, LTC6905, LTC6905-XXX, Evaluation Kit
中文描述： AD6624：四通道。 80 MSPS的數(shù)字接收信號(hào)處理器（RSP）的數(shù)據(jù)資料（版本A 9月2日）
文件頁(yè)數(shù)： 11/40頁(yè)
文件大?。?/td> 927K
代理商： AD6624
REV. A
AD6624
–11–
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Type
Function
1, 12, 38, 50, 65, 76, 102, 113
2–6
7, 17, 32, 44, 54, 81, 96, 118
8
9
10
11
13
14–16
18–21
22, 59, 71, 86, 108, 123
23–26
27, 39, 64, 91, 103, 128
28–31
33–34
35
36
37
40
41
42
43
45
46–49
51–53
55
56
57
58
60
61–63
66
67
68
69
70
72
73–75
77
78
79–80
82–83
84
85
87
88
89
90
VSS
INB[5:1]
1
VDD
INB0
1
IENB
2
LIB-B
LIB-A
CLK
EXPA[0:2]
1
INA[13:10]
1
VDDIO
INA[9:6]
1
VSSIO
INA[5:2]
1
INA[1:0]
1
IENA
2
LIA-B
LIA-A
SYNCD
1
SYNCC
1
SYNCB
1
SYNCA
1
RESET
D[7:4]
D[3:1]
D0
DS
(
RD
)
DTACK
(RDY)
2
RW(
WR
)
MODE
A[2:0]
CS
1
TRST
2
TCLK
1
TMS
2
TDO
TDI
2
CHIP_ID[3:1]
1
CHIP_ID0
1
SBM0
1
SDIV[3:2]
1
SDIV[1:0]
1
SCLK0
1
SDFS0
1
SDO0
1
SDIN0
1
SDFE0
DR0
G
I
P
I
I
O
O
I
I
I
P
I
G
I
I
I
O
O
I
I
I
I
I
I/O/T
I/O/T
I/O/T
I
O/T
I
I
I
I
I
I
I
O/T
I
I
I
I
I
I
I/O
I/O
O/T
I
O
O
Ground
B Input Data (Mantissa)
2.5 V Supply
B Input Data (Mantissa)—LSB
Input Enable—Input B
Level Indicator—Input B, Interleaved—Data B
Level Indicator—Input B, Interleaved—Data A
Input Clock
A Input Data (Exponent)
A Input Data (Mantissa)
3.3 V Supply
A Input Data (Mantissa)
Ground
A Input Data (Mantissa)
A Input Data (Mantissa)
Input Enable—Input A
Level Indicator—Input A, Interleaved—Data B
Level Indicator—Input A, Interleaved—Data A
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
Active Low Reset Pin
Bidirectional Microport Data
Bidirectional Microport Data
Bidirectional Microport Data—LSB
Active Low Data Strobe (Active Low Read)
Active Low Data Acknowledge (Microport Status Bit)
Read Write (Active Low Write)
Intel or Motorola Mode Select
Microport Address Bus
Chip Select
Test Reset Pin
Test Clock Input
Test Mode Select Input
Test Data Output
Test Data Input
Chip ID Selector
Chip ID Selector—LSB
Serial Bus Master—Channel 0 Only
Serial Clock Divisor—Channel 0
Serial Clock Divisor—Channel 0
Bidirectional Serial Clock—Channel 0
Bidirectional Serial Data Frame Sync—Channel 0
Serial Data Output—Channel 0
Serial Data Input—Channel 0
Serial Data Frame End—Channel 0
Output Data Ready Indicator—Channel 0
相關(guān)PDF資料
PDF描述
AD662AQ 12-Bit Digital-to-Analog Converter
AD662BQ 12-Bit Digital-to-Analog Converter
AD662JN 12-Bit Digital-to-Analog Converter
AD662KN 12-Bit Digital-to-Analog Converter
AD662SQ 12-Bit Digital-to-Analog Converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD6624A 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
AD6624AABC 制造商:Advanced Micro Devices 功能描述:
AD6624AABCZ 功能描述:DIGITAL SIGNAL PROC 196 CSP-BGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
AD6624AS 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP)
AD6624AS/PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
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