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參數(shù)資料
| 型號： | AD6655BCPZ-1051 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Diversity Receiver |
| 中文描述： | IF分集接收機 |
| 文件頁數(shù)： | 22/84頁 |
| 文件大?。?/td> | 2012K |
| 代理商： | AD6655BCPZ-1051 |
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AD6655
Pin No.
Digital Input
52
Digital Outputs
63
62
3
2
5
4
7
6
9
8
13
12
15
14
17
16
19
18
23
22
26
25
28
27
30
29
32
31
11
10
SPI Control
48
47
51
Signal Monitor Port
33
Rev. 0 | Page 22 of 84
Mnemonic
Type
Description
SYNC
Input
Digital Synchronization Pin. Slave mode only.
D0+ (LSB)
D0 (LSB)
D1+
D1
D2+
D2
D3+
D3
D4+
D4
D5+
D5
D6+
D6
D7+
D7
D8+
D8
D9+
D9
D10+
D10
D11+
D11
D12+
D12
D13+ (MSB)
D13 (MSB)
DCO+
DCO
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Channel A/Channel B LVDS Output Data 0—True.
Channel A/Channel B LVDS Output Data 0—Complement.
Channel A/Channel B LVDS Output Data 1—True.
Channel A/Channel B LVDS Output Data 1—Complement.
Channel A/Channel B LVDS Output Data 2—True.
Channel A/Channel B LVDS Output Data 2—Complement.
Channel A/Channel B LVDS Output Data 3—True.
Channel A/Channel B LVDS Output Data 3—Complement.
Channel A/Channel B LVDS Output Data 4—True.
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6—True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Output Data 11—True.
Channel A/Channel B LVDS Output Data 11—Complement.
Channel A/Channel B LVDS Output Data 12—True.
Channel A/Channel B LVDS Output Data 12—Complement.
Channel A/Channel B LVDS Output Data 13—True.
Channel A/Channel B LVDS Output Data 13—Complement.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—Complement.
SCLK/DFS
SDIO/DCS
CSB
Input
Input/Output
Input
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer in External Pin Mode.
SPI Chip Select (Active Low).
SMI SDO/OEB
Input/Output
Signal Monitor Serial Data Output/Output Enable Input (Active Low) in External
Pin Mode.
Signal Monitor Serial Data Frame Sync.
Signal Monitor Serial Clock Output/Power-Down Input (Active High) in External
Pin Mode
35
34
SMI SDFS
SMI SCLK/PDWN
Output
Input/Output
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