參數(shù)資料
型號(hào): AD7147A-1ACBZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 24/69頁
文件大?。?/td> 0K
描述: IC CDC 13CH I2C W/RAM 25WLCSP
產(chǎn)品變化通告: 8mm Carrier Tape Changes 28/Feb/2012
標(biāo)準(zhǔn)包裝: 10,000
系列: CapTouch™
類型: 電容數(shù)字轉(zhuǎn)換器
分辨率(位): 16 b
采樣率(每秒): 250k
數(shù)據(jù)接口: I²C,串行
電壓電源: 單電源
電源電壓: 2.6 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 25-UFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 25-WLCSP
包裝: 帶卷 (TR)
AD7147A
Rev. B | Page 29 of 68
GPIO INT OUTPUT CONTROL
The INT output signal can be controlled by the GPIO pin when
the GPIO is configured as an input. The GPIO is configured as
an input by setting the GPIO_SETUP bits in the interrupt enable
register to 01. See the
section for more information on how to configure the GPIO.
Enable the GPIO interrupt by setting the GPIO_INT_ENABLE
bit in Register 0x007 to 1, or disable the GPIO interrupt by
clearing this bit to 0. The GPIO status bit in the conversion-
complete interrupt status register reflects the status of the GPIO
interrupt. This bit is set to 1 when the GPIO has triggered INT.
The bit is cleared upon reading the GPIO_INT_STATUS bit if the
condition that caused the interrupt is no longer present.
The GPIO interrupt can be set to trigger on a rising edge, falling
edge, high level, or low level at the GPIO input pin. Table 16 shows
how the settings of the GPIO_INPUT_CONFIG bits in the inter-
rupt enable (STAGE_LOW_INT_ENABLE) register affect the
behavior of INT.
Figure 42 to Figure 45 show how the interrupt output is cleared
upon a read from the GPIO_INT_STATUS bit.
Table 16. GPIO Interrupt Behavior
GPIO_INPUT_CONFIG
GPIO Pin
GPIO_INT_STATUS
INT
INT Behavior
00 = Negative Level Triggered
1
0
1
Not triggered
00 = Negative Level Triggered
0
1
0
Asserted while signal on GPIO pin is low
01 = Positive Edge Triggered
1
0
Pulses low at low-to-high GPIO transition
01 = Positive Edge Triggered
0
1
Not triggered
10 = Negative Edge Triggered
1
0
1
Pulses low at high-to-low GPIO transition
10 = Negative Edge Triggered
0
1
0
Not triggered
11 = Positive Level Triggered
1
0
Asserted while signal on GPIO pin is high
11 = Positive Level Triggered
0
1
Not triggered
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