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參數(shù)資料
| 型號： | AD7147AACBZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/69頁 |
| 文件大小： | 0K |
| 描述： | IC CDC 13CH SPI W/RAM 25WLCSP |
| 產(chǎn)品變化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 標準包裝： | 10,000 |
| 系列： | CapTouch™ |
| 類型： | 電容數(shù)字轉(zhuǎn)換器 |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.6 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 25-UFBGA，WLCSP |
| 供應商設備封裝： | 25-WLCSP |
| 包裝： | 帶卷 (TR) |
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AD7147A
Rev. B | Page 34 of 68
SDI
CW
15
CW
14
CW
13
CW
8
CW
1
CW
0
XX
SCLK
CW
12
XX
X
READBACK DATA FOR
STARTING REGISTER ADDRESS
X
1
32
23
4
15
16
17
18
31
34
33
48
47
49
CW
11
CW
10
CW
9
CW
7
CW
2
CW
6
CW
5
CW
4
CW
3
11
12
13
14
56
7
8
910
XXX XXX XXX
XXX
D15
D14
D1
D0
D1
D0
D15
D14
XXX XXX XXX XXX XXX XXX
XXX
XXX XXX
XXX
XXX XXX
SDO
ENABLE WORD
R/W
REGISTER ADDRESS
NOTES
1. MULTIPLE REGISTERS CAN BE READ BACK CONTINUOUSLY.
2. THE 16-BIT CONTROL WORD MUST BE WRITTEN ON SDI: 5 BITS FOR ENABLE WORD, 1 BIT FOR R/W, AND 10 BITS FOR REGISTER ADDRESS.
3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 16-BIT DATA-WORD BEING READ BACK ON THE SDO PIN.
4. CS IS HELD LOW UNTIL ALL REGISTER BITS HAVE BEEN READ BACK.
5. X DENOTES DON’T CARE.
6. XXX DENOTES HIGH IMPEDANCE THREE-STATE OUTPUT.
7. 16-BIT COMMAND WORD SETTINGS FOR SEQUENTIAL READBACK OPERATION:
CW[15:11] = 11100 (ENABLE WORD)
CW[10] = 1 (R/W)
CW[9:0] = [AD9, AD8, AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0] (STARTING MSB-JUSTIFIED REGISTER ADDRESS)
READBACK DATA FOR
NEXT REGISTER ADDRESS
CS
16-BIT COMMAND WORD
0
7727-
051
Figure 51. Sequential Register Readback SPI Timing
I2C-COMPATIBLE INTERFACE
The AD7147A-1 supports the industry standard, 2-wire I2C
serial interface protocol. The two wires associated with the
I2C timing are the SCLK and SDA inputs. The SDA is an I/O pin
that allows both register write and register readback operations. The
AD7147A-1 is always a slave device on the I2C serial interface bus.
The AD7147A-1 has a 7-bit device address, Address 0101 1XX.
The lower two bits are set by tying the ADD0 and ADD1 pins
high or low. The AD7147A-1 responds when the master device
sends its device address over the bus. The AD7147A-1 cannot
initiate data transfers on the bus.
Table 19. AD7147A-1 I2C Device Address
ADD1
ADD0
I2C Address
0
0101 100
0
1
0101 101
1
0
0101 110
1
0101 111
Data Transfer
Data is transferred over the I2C serial interface in 8-bit bytes.
The master initiates a data transfer by establishing a start con-
dition, defined as a high-to-low transition on the serial data
line, SDA, while the serial clock line, SCLK, remains high. This
indicates that an address/data stream follows.
All slave peripherals connected to the serial bus respond to the
start condition and shift in the next eight bits, consisting of a
7-bit address (MSB first) plus an R/W bit that determines the
direction of the data transfer. The peripheral whose address
corresponds to the transmitted address responds by pulling the
data line low during the ninth clock pulse. This is known as the
acknowledge bit. All other devices on the bus then remain idle
while the selected device waits for data to be read from or written
to it. If the R/W bit is 0, the master writes to the slave device. If
the R/W bit is 1, the master reads from the slave device.
Data is sent over the serial bus in a sequence of nine clock
pulses—eight bits of data followed by an acknowledge bit from
the slave device. Transitions on the data line must occur during
the low period of the clock signal and remain stable during the
high period, because a low-to-high transition when the clock is
high can be interpreted as a stop signal. The number of data
bytes transmitted over the serial bus in a single read or write
operation is limited only by what the master and slave devices
can handle.
When all data bytes are read or written, a stop condition is
established. A stop condition is defined by a low-to-high
transition on SDA while SCLK remains high. If the AD7147A
encounters a stop condition, it returns to its idle condition, and
the address pointer register resets to Address 0x00.
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| AD7147ACPZ-1500RL7 | 功能描述:IC CAP-TO-DGTL CONV PROG 24LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:CapTouch™ 產(chǎn)品培訓模塊:Data Converter Basics 標準包裝:1 系列:- 類型:電機控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應商設備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
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| AD7147ACPZ-500RL7 | 功能描述:IC CAP-TO-DGTL CONV PROG 24LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:CapTouch™ 產(chǎn)品培訓模塊:Data Converter Basics 標準包裝:1 系列:- 類型:電機控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應商設備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
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