參數(shù)資料
型號(hào)： AD7148ACPZ-1500RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 4/57頁(yè)
文件大?。?/td> 0K
描述： IC CAP-TO-DGTL CONV PROG 16LFCSP
標(biāo)準(zhǔn)包裝： 1
類型： 電容性
觸摸面板接口： 2 線
輸入數(shù)/鍵： 8 鍵
分辨率（位）： 16 b
數(shù)據(jù)接口： I²C，串行
數(shù)據(jù)速率/采樣率 (SPS，BPS)： 250k
電壓基準(zhǔn)： 內(nèi)部
電源電壓： 2.6 V ~ 3.3 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-VQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 781 (CN2011-ZH PDF)
其它名稱： AD7148ACPZ-1500RL7DKR
AD7148
Rev. A | Page 11 of
CDC
O
56
Registering a Sensor Activation
When a user approaches a sensor, the total capacitance associated
with that sensor changes and is measured by the AD7148. When
the capacitance changes to such an extent that a set threshold
is exceeded, the AD7148 registers this as a sensor activation.
On-chip threshold limits are used to determine when sensor acti-
vation occurs. Figure 17 shows the change in CDC_RESULT_Sx
that occurs when a user activates a sensor. The sensor is deemed
to be active only when the value of CDC_RESULT_Sx is either
greater than the value of STAGEx_HIGH_THRESHOLD or less
than the value of STAGEx_LOW_THRESHOLD.
UT
P
UT
CO
DE
S
STAGEx_HIGH_THRESHOLD
STAGEx_LOW_THRESHOLD
AMBIENT OR
NO-TOUCH VALUE
SENSOR ACTIVE (A)
CDC_RESULT_Sx
07
15
5-
0
16
SENSOR ACTIVE (B)
0
715
5-
0
17
Figure 17. Sensor Activation Thresholds
In Figure 17, two different sensor activations are shown. Sensor
Activate (A) occurs when a sensor is connected to the positive
input of the converter. In this case, when a user activates the
sensor, there is an increase in the CDC code, and the value of
CDC_RESULT_Sx exceeds the value of STAGEx_HIGH_
THRESHOLD. Sensor Active (B) occurs when the sensor is
connected to the negative input of the converter. In this case, when
a user activates the sensor, there is a decrease in the CDC code,
and the value of CDC_RESULT_Sx becomes less than the value of
STAGEx_LOW_THRESHOLD.
For each conversion stage, the STAGEx_HIGH_THRESHOLD
and the STAGEx_LOW_THRESHOLD registers are in Register
Bank 3. The values in these registers are updated automatically
by the AD7148 due to its environmental calibration and adaptive
threshold logic.
At power-up, the values in the STAGEx_HIGH_THRESHOLD
and STAGEx_LOW_THRESHOLD registers are the same as those
in the STAGEx_OFFSET_HIGH and STAGEx_OFFSET_LOW
registers in Register Bank 2. The user must program the STAGEx_
OFFSET_HIGH and STAGEx_OFFSET_LOW registers on device
power-up. See the Environmental Calibration section for more
information.
Complete Solution for Capacitance Sensing
Analog Devices, Inc., provides a complete solution for capacitance
sensing. The two main elements of the solution are the sensor PCB
and the AD7148.
If the application requires high resolution sensors such as scroll
bars or wheels, software is required that runs on the host processor.
No position algorithm is required for button sensors.
The memory requirements for the host depend on the sensor
and are typically 10 kB of code and 600 bytes of data memory,
depending on the sensor type.
SENSOR PCB
HOST PROCESSOR
1 MIPS
10kB ROM
600 BYTES RAM
SPI OR I2C
AD7148
Figure 18. Three-Part Capacitance Sensing Solution
Analog Devices supplies the sensor PCB footprint design libraries
to the customer and supplies any necessary software on an open-
source basis.
BIAS PIN
The BIAS pin (Pin 6) is connected internally to the bias node in
the AD7148. To ensure correct operation of the AD7148, connect
a 100 nF capacitor between the BIAS pin and ground. The voltage
at the BIAS pin is VCC/2.
OPERATING MODES
The AD7148 has three operating modes. Full power mode, in
which the device is always fully powered, is suited for applications
where power is not a concern (for example, game consoles that
have an ac power supply). Low power mode, in which the part
automatically powers down, is tailored to give significant power
savings over full power mode and is suited for mobile applications
where power must be conserved. In shutdown mode, the part
shuts down completely.
The POWER_MODE bits of the PWR_CONTROL register
(Address 0x000[1:0]) set the operating mode on the AD7148.
Table 7 shows the POWER_MODE settings for each operating
mode. To put the AD7148 into shutdown mode, set the
POWER_MODE bits to either 01 or 11.
Table 7. POWER_MODE Settings
POWER_MODE Bits
Operating Mode
00
Full power mode
01
Shutdown mode
10
Low power mode
11
Shutdown mode
The power-on default setting of the POWER_MODE bits is 00,
full power mode.
Full Power Mode
In full power mode, all sections of the AD7148 remain fully
powered and converting at all times. While a sensor is being
touched, the AD7148 processes the sensor data. If no sensor is
touched, the AD7148 measures the ambient capacitance level
and uses this data for the on-chip compensation routines. In full
power mode, the AD7148 converts at a constant rate. See the CDC
Conversion Sequence Time section for more information.
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