REV.
–2–
AD7226–SPECIFICATIONS
(VDD = 11.4 V to 16.5 V, VSS = –5 V
10%, AGND = DGND = 0 V; VREF = +2 V to (VDD – 4 V)
1,
unless otherwise noted. All Specifications TMIN to TMAX unless otherwise noted.)
DUAL SUPPLY
Parameter
K, B Versions
2
Unit
Conditions/Comments
STATIC PERFORMANCE
Resolution
8
Bits
Total Unadjusted Error
±1LSB max
VDD = 15 V
± 5%, VREF = 10 V
Relative Accuracy
±0.5
LSB max
Differential Nonlinearity
±1LSB max
Guaranteed Monotonic
Full-Scale Error
±0.5
LSB max
Full-Scale Temperature Coefficient
±20
ppm/
∞C typ
VDD = 14 V to 16.5 V, VREF = +10 V
Zero Code Error
±20
mV max
Zero Code Error Temperature Coefficient
±50
mV/∞C typ
REFERENCE INPUT
Voltage Range
2 to (VDD – 4)
V min to V max
Input Resistance
2
k
W min
Input Capacitance
3
50
pF min
Occurs when each DAC is loaded with all 0s.
200
pF max
Occurs when each DAC is loaded with all 1s.
DIGITAL INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
Input Leakage Current
±1
mA max
VIN = 0 V or VDD
Input Capacitance
8
pF max
Input Coding
Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
4
2.5
V/
ms min
Voltage Output Settling Time
4
ms max
VREF = 10 V; Settling Time to
±1/2 LSB
Digital Crosstalk
10
nV secs typ
Minimum Load Resistance
2
k
W min
VOUT = 10 V
POWER SUPPLIES
VDD Range
11.4/16.5
V min/V max
For Specified Performance
IDD
13
mA max
Outputs Unloaded; VIN = VINL or VINH
ISS
11
mA max
Outputs Unloaded; VIN = VINL or VINH
SWITCHING CHARACTERISTICS
4, 5
Address to Write Setup Time, tAS
0ns min
Address to Write Hold Time, tAH
0ns min
Data Valid to Write Setup Time, tDS
50
ns min
Data Valid to Write Hold Time, tDH
0ns min
Write Pulsewidth, tWR
50
ns min
NOTES
1Maximum possible reference voltage.
2Temperature ranges are as follows:
K Version: –40
∞C to +85∞C
B Version: –40
∞C to +85∞C
3Guaranteed by design. Not production tested.
4Sample Tested at 25
∞C to ensure compliance.
5Switching Characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
4
o
f
1
4
D