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參數(shù)資料
| 型號(hào)： | AD7233ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT LC2MOS SRL 8-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 10µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 168mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 300k |
AD7233
REV. B
–8–
C00989a-0-4/01(B)
PRINTED
IN
U.S.A.
AD7233-68HC11 Interface
Figure 8 shows a serial interface between the AD7233 and the
68HC11 microcontroller. SCK of the 68HC11 drives SCLK of
the AD7233 while the MOSI output drives the serial data line.
The
SYNC signal is derived from a port line (PC7 shown).
For correct operation of this interface, the 68HC11 should be
configured such that its CPOL bit is a 0 and its CPHA bit is a
1. When data is to be transmitted to the part, PC7 is taken low.
When the 68HC11 is configured like this, data on MOSI is valid
on the falling edge of SCK. The 68HC11 transmits its serial
data in 8-bit bytes with only eight falling clock edges occurring
in the transmit cycle. To load data to the AD7233, PC7 is kept
low after the first eight bits are transferred and a second byte of
data is then transferred serially to the AD7233. When the sec-
ond serial transfer is complete, the PC7 line is taken high. Fig-
ure 8 shows the
LDAC input of the AD7233 hardwired low.
As a result, the DAC latch and the analog output of the DAC
will be updated on the sixteenth falling edge of SCK after the
respective
SYNC signal has gone low. Alternatively, the scheme
used in previous interfaces, whereby the
LDAC input is driven
from a timer, can be used.
LDAC
68HC11*
SYNC
SCLK
PC7
SCK
*ADDITIONAL PINS OMITTED FOR CLARITY
AD7233*
MOSI
SDIN
Figure 8. AD7233 to 68HC11 Interface
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Plastic DIP (N-8) Package
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.022 (0.558)
0.014 (0.356)
0.160 (4.06)
0.115 (2.93)
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
8
14
5
PIN 1
0.280 (7.11)
0.240 (6.10)
0.100 (2.54)
BSC
0.430 (10.92)
0.348 (8.84)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
AD7233–Revision History
Location
Page
Data Sheet changed from REV. A to REV. B.
B Version column added to Specifications table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7233ANZ | 制造商:Analog Devices 功能描述:D/A Converter (D-A) IC |
| AD7233BN | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 12-bit 8-Pin PDIP Tube 制造商:Analog Devices 功能描述:SEMICONDUCTORSLINEAR |
| AD7233BNZ | 功能描述:IC DAC 12BIT SRL W/AMP 8PDIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD7237 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS DUAL 12-BIT DACPORT |
| AD7237A | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Dual 12-Bit DACPORTs |
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