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14
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REV. PrF
PRELIMINARY TECHNICAL DATA
AD7276/AD7277/AD7278
Preliminary Technical Data
TYPICAL CONNECTION DIAGRAM
Figure 10 shows a typical connection diagram for the
AD7276/AD7277/AD7278. V
REF
is taken internally from
V
DD
and as such V
DD
should be well decoupled. This
provides an analog input range of 0V to V
DD
. The
conversion result is output in a 16-bit word with two
leading zeros followed by the 12-bit, 10-bit or 8-bit result.
The 12-bit result from the AD7276 will be followed by
two trailing zeros and the 10-bit and 8-bit result from the
AD7277 and AD7278 will be followed by four and six
trailing zeros respectively.
Alternatively, because the supply current required by the
AD7276/AD7277/AD7278 is so low, a presision reference
can be used as the supply source to the AD7276/AD7277/
AD7278. A REF19x voltage reference (REF193 for 3V)
can be used to supply the required voltage to the ADC
-see Figure 10. This configuration is especially useful if
the power supply is quite noisy or if the system supply
voltages are at some value other than 3V (e.g. 5V or 15V).
The REF19x will output a steady voltage to the AD7276/
7277/7278. If the low dropout REF193 is used, the
current it needs to supply to the AD7276/AD7277/
AD7278 is typically TBD mA. When the ADC is
converting at a rate of 3 MSPS the REF193 will need to
supply a maximum of TBD mA to the AD7276/AD7277/
AD7278. The load regulation of the REF193 is typically
10 ppm/mA (REF193, V
S
= 5V), which results in an error
of TBD ppm (TBD
μ
V) for the TBD mA
drawn from it.
This corresponds to a TBD LSB
error for the AD7276
with V
DD
= 3V from the REF193, a TBD LSB error for
the AD7277, and a TBD LSB error for the AD7278. For
applications where power consumption is of concern, the
Power-Down mode of the ADC and the sleep mode of the
REF19x reference should be used to improve power per-
formance. See Modes of Operation section.
Figure 10. REF193 as Power Supply to AD7276/
AD7277/AD7278
V
DD
VIN
GND
+5V
SUPPLY
0.1
μF
10μF
REF193
0.1μF
1μF
TANT
+3V
0V toVDD
INPUT
SDATA
DSP/
μC/μP
SCLK
SERIAL
INTERFACE
&6
TBD mA
680nF
AD7276/
AD7277/
AD7278
Table I provides some typical performance data with
various references used as a V
DD
source under the same
set-up conditions.
Reference Tied AD7276 SNR Performance
To V
DD
TBD kHz Input
AD780@3V
ADR423
TBD dB
TBD dB
AD780@2.5V TBD dB
REF192
TBD dB
ADR421
TBD dB
ADR291
TBD dB
Table I. AD7276 performance for various Voltage
References IC
Analog Input
Figure 11 shows an equivalent circuit of the analog input
structure of the AD7276/AD7277/AD7278. The two
diodes D1 and D2 provide ESD protection for the analog
inputs. Care must be taken to ensure that the analog input
signal never exceeds the supply rails by more than 300mV.
This will cause these diodes to become forward biased and
start conducting current into the substrate. 10mA is the
maximum current these diodes can conduct without
causing irreversable damage to the part. The capacitor C1
in Figure 11 is typically about 4pF and can primarily be
attributed to pin capacitance. The resistor R1 is a lumped
component made up of the on resistance of a switch. This
resistor is typically about TBD
.
The capacitor C2 is the
ADC sampling capacitor and has a capacitance of
TBD
pF typically. For ac applications, removing high
frequency components from the analog input signal is
recommended by use of a bandpass filter on the relevant
analog input pin. In applications where harmonic distor-
tion and signal to noise ratio are critical, the analog input
should be driven from a low impedance source. Large
source impedances will significantly affect the ac perfor-
mance of the ADC. This may necessitate the use of an
input buffer amplifier. The choice of the op-amp will be a
function of the particular application.
Figure 11. Equivalent Analog Input Circuit
VIN
D1
VDD
D2
R1
C2
TBDPF
C1
4pF
CONVERSIONPHASE- SWITCHOPEN
TRACKPHASE- SWITCH CLOSED