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參數(shù)資料
| 型號(hào)： | AD7305BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | +3 V/+5 V, Rail-to-Rail Quad, 8-Bit DAC |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| 封裝： | MS-013AC, SOIC-20 |
| 文件頁(yè)數(shù)： | 6/14頁(yè) |
| 文件大?。?/td> | 936K |
| 代理商： | AD7305BR |
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AD7304/AD7305
–
6
–
REV. A
AD7304 PIN FUNCTION DESCRIPTIONS
Pin #
Name
Function
1
V
OUT
B
Channel B rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
B pin. Output
is open circuit when SHDN is enabled.
Channel A rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
A pin. Output
is open circuit when SHDN is enabled.
Negative Power Supply Input. Specified range of operation 0 V to –5.5 V.
Channel A Reference Input. Establishes V
OUT
A full-scale voltage. Specified range of operation V
SS
< V
REF
A < V
DD
.
Channel B Reference Input. Establishes V
OUT
B full-scale voltage. Specified range of operation V
SS
< V
REF
B < V
DD
.
Common Analog and Digital Ground.
Load DAC register strobe, active low. Transfers all four Input Register data into their DAC registers. Asynchronous
active low input. DAC Register is transparent when
LDAC
= 0. See Control Logic Truth Table for operation.
Clears all Input and DAC registers to the zero condition. Asynchronous active low input. The serial register is not effected.
Chip Select, Active Low Input. Disables shift register loading when high. Transfers Serial Input Register Data to the
decoded Input Register when
CS
returns HIGH. Does not effect
LDAC
operation.
Clock input, positive edge clocks data into shift register. Disabled by chip select
CS
.
Serial Data-Input loads directly into the shift register, MSB first. Hardware shutdown (SHDN) control input, active
when pin is left floating by a three-state logic driver. Does not effect DAC register contents as long as power is
present on V
DD
.
Channel D Reference Input. Establishes V
OUT
D full-scale voltage. Specified range of operation V
SS
< V
REF
D < V
DD
.
Channel C Reference Input. Establishes V
OUT
C full-scale voltage. Specified range of operation V
SS
< V
REF
C < V
DD
.
Positive power supply input. Specified range of operation +2.7 V to +5.5 V.
Channel D rail-to-rail buffered DAC voltage output. Full-scale set by reference voltage applied to V
REF
D pin. Output
is open circuit when SHDN is enabled.
Channel C rail-to-rail buffered DAC voltage output. Full-scale set by reference voltage applied to V
REF
C pin. Output
is open circuit when SHDN is enabled.
2
V
OUT
A
3
4
5
6
7
V
SS
V
REF
A
V
REF
B
GND
LDAC
8
9
CLR
CS
10
11
CLK
SDI/SHDN
12
13
14
15
V
REF
D
V
REF
C
V
DD
V
OUT
D
16
V
OUT
C
AD7305 PIN FUNCTION DESCRIPTIONS
Pin #
Name
Function
1
V
OUT
B
Channel B rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
B pin. Output
is open circuit when SHDN is enabled.
Channel A rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
A pin. Output
is open circuit when SHDN is enabled.
Negative Power Supply Input. Specified range of operation 0 V to –5.5 V.
Channel B Reference Input. Establishes V
OUT
full-scale voltage. Specified range of operation V
SS
< V
REF
< V
DD
.
Common Analog and Digital Ground.
Load DAC register strobe, active low. Transfers all four Input Register data into their DAC registers. Asynchronous
active low input. DAC Register is transparent when
LDAC
= 0. See Control Logic Truth Table for operation.
MSB Digital Input Data Bit.
Data Bit 6.
Data Bit 5.
Data Bit 4.
Data Bit 3.
Data Bit 2.
Data Bit 1.
LSB Digital Input Data Bit.
Write data into Input Register control line, active low. See Control Logic Truth Table for operation.
Address Bit 1.
Address Bit 0/Hardware shutdown (SHDN) control input, active when pin is left floating by a three-state logic driver.
Does not effect DAC register contents as long as power is present on V
DD
.
Positive Power Supply Input. Specified range of operation +2.7 V to +5.5 V.
Channel D rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
D pin. Output
is open circuit when SHDN is enabled.
Channel C rail-to-rail buffered DAC voltage output. Full scale set by reference voltage applied to V
REF
C pin. Output
is open circuit when SHDN is enabled.
2
V
OUT
A
3
4
5
6
V
SS
V
REF
GND
LDAC
7
8
9
10
11
12
13
14
15
16
17
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
WR
A1
A0/SHDN
18
19
V
DD
V
OUT
D
20
V
OUT
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7305BRU | +3 V/+5 V, Rail-to-Rail Quad, 8-Bit DAC |
| AD7305* | Ultra High Speed Operational Amplifier; Package: SO; No of Pins: 8; Temperature Range: 0°C to +70°C |
| AD7306 | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
| AD7306AN | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
| AD7306AR | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7305BR-REEL | 功能描述:IC DAC 8BIT QUAD R-R 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD7305BR-REEL7 | 功能描述:INTEGRATED CIRCUIT 制造商:analog devices inc. 系列:* 包裝:帶卷（TR） 零件狀態(tài):最後搶購(gòu) 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商器件封裝:20-SOIC 標(biāo)準(zhǔn)包裝:1 |
| AD7305BRU | 功能描述:IC DAC 8BIT QUAD R-R 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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| AD7305BRUZ | 功能描述:IC DAC 8BIT QUAD R-R 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
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