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參數資料
| 型號： | AD7701AR |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 18/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT LC2MOS 20-SOIC |
| 標準包裝： | 1 |
| 位數： | 16 |
| 采樣率（每秒）： | 4k |
| 數據接口： | 串行 |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 37mW |
| 電壓電源： | 模擬和數字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC W |
| 包裝： | 管件 |
| 輸入數目和類型： | 1 個單端，單極；1 個單端，雙極 |
REV. E
AD7701
–7–
1.6mA
200A
CL
100pF
TO
OUTPUT
PIN
IOH
2.1V
+
IOL
Figure 1. Load Circuit for Access
Time and Bus Relinquish Time
DATA
VALID
t
10
HI-Z
SDATA
CS
Figure 3. SSC Mode Data
Hold Time
CAL
SC1, SC2
SC1, SC2 VALID
t
1
t
2
Figure 2a. Calibration Control Timing
DATA
VALID
t
15
HI-Z
SDATA
CS
Figure 4a. SEC Mode Data Hold Time
CLKIN
SLEEP
t
3
Figure 2b.
SLEEP Mode Timing
HI-Z
DB15 DB14
DB1
DB0
HI-Z
SDATA
DRDY
CS
t
12
t
11
t
13
t
14
SCLK
t
16
Figure 4b. SEC Mode Timing Diagram
HI-Z
DB15
DB14
DB1
DB0
HI-Z
SCLK
SDATA
CLKIN
CS
HI-Z
t
7
t
6
t
5
t
4
t
8
t
5
Figure 5. SSC Mode Timing Diagram
HI-Z
START
DB8
DB9
DB7
STOP 1
STOP 2
HI-Z
HIGH BYTE
LOW BYTE
SDATA
SCLK
DRDY
CS
t
17
t
18
t
19
Figure 6. AC Mode Timing Diagram
DEFINITION OF TERMS
Linearity Error
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are zero scale (not to be
confused with bipolar zero), a point 0.5 LSB below the first
code transition (000 . . . 000 to 000 . . . 001) and full scale, a
point 1.5 LSB above the last code transition (111 . . . 110 to
111 . . . 111). The error is expressed as a percentage of full scale.
Differential Linearity Error
This is the difference between any code’s actual width and the
ideal (1 LSB) width. Differential linearity error is expressed in
LSBs. A differential linearity specification of
± 1 LSB or less
guarantees monotonicity.
Positive Full-Scale Error
Positive full-scale error is the deviation of the last code transition
(111 . . . 110 to 111 . . . 111) from the ideal (VREF
±3/2 LSBs).
It applies to both positive and negative analog input ranges and
is expressed in microvolts.
Unipolar Offset Error
Unipolar offset error is the deviation of the first code transition
from the ideal (AGND + 0.5 LSB) when operating in the Uni-
polar mode. It is expressed in microvolts.
Bipolar Zero Error
This is the deviation of the midscale transition (0111 . . . 111 to
1000 . . . 000) from the ideal (AGND – 0.5 LSB) when operating
in the Bipolar mode. It is expressed in microvolts.
Bipolar Negative Full-Scale Error
This is the deviation of the first code transition from the ideal
(–VREF + 0.5 LSB) when operating in the Bipolar mode. It is
expressed in microvolts.
Positive Full-Scale Overrange
Positive full-scale overrange is the amount of overhead available
to handle input voltages greater than +VREF (for example, noise
peaks or excess voltages due to system gain errors in system
calibration routines) without introducing errors due to overloading
the analog modulator or overflowing the digital filter. It is
expressed in millivolts.
Negative Full-Scale Overrange
This is the amount of overhead available to handle voltages below
–VREF without overloading the analog modulator or overflowing
the digital filter. Note that the analog input will accept negative
voltage peaks even in the Unipolar mode. The overhead is
expressed in millivolts.
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| AD7701ARS | 功能描述:IC ADC 16BIT LC2MOS MONO 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
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