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參數(shù)資料
| 型號： | AD7714AR-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC SIGNAL COND 5V 24-SOIC |
| 標準包裝： | 31 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 1k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 3 個差分，單極；3 個差分，雙極；5 個偽差分，單極；5 個偽差分，雙極 |
| 配用： | EVAL-AD7714-3EBZ-ND - BOARD EVAL FOR AD7714 |
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AD7714
REV. C
–14–
ON-CHIP REGISTERS
The AD7714 contains eight on-chip registers which can be accessed via the serial port of the part. The first of these is a Communica-
tions Register which controls the channel selection, decides whether the next operation is a read or write operation and also decides
which register the next read or write operation accesses. All communications to the part must start with a write operation to the
Communications Register. After power-on or
RESET, the device expects a write to its Communications Register. The data written
to this register determines whether the next operation to the part is a read or a write operation and also determines to which register
this read or write operation occurs. Therefore, write access to any of the other registers on the part starts with a write operation to the
Communications Register followed by a write to the selected register. A read operation from any other register on the part (including
the output data register) starts with a write operation to the Communications Register followed by a read operation from the selected
register. The communications register also controls channel selection and the
DRDY status is also available by reading from the
Communications Register. The second register is a Mode Register which determines calibration mode and gain setting. The third
register is labelled the Filter High Register and this determines the word length, bipolar/unipolar operation and contains the upper 4
bits of the filter selection word. The fourth register is labelled the Filter Low Register and contains the lower 8 bits of the filter selec-
tion word. The fifth register is a Test Register which is accessed when testing the device. The sixth register is the Data Register from
which the output data from the part is accessed. The final registers allow access to the part’s calibration registers. The Zero Scale
Calibration Register allows access to the zero scale calibration coefficients for the selected input channel while the Full Scale Calibra-
tion Register allows access to the full scale calibration coefficients for the selected input channel. The registers are discussed in more
detail in the following sections.
Communications Register (RS2-RS0 = 0, 0, 0)
The Communications Register is an 8-bit register from which data can either be read or to which data can be written. All communi-
cations to the part must start with a write operation to the Communications Register. The data written to the Communications Reg-
ister determines whether the next operation is a read or write operation and to which register this operation takes place. Once the
subsequent read or write operation to the selected register is complete, the interface returns to where it expects a write operation to
the Communications Register. This is the default state of the interface, and on power-up or after a
RESET, the AD7714 is in this
default state waiting for a write operation to the Communications Register. In situations where the interface sequence is lost, if a
write operation of sufficient duration (containing at least 32 serial clock cycles) takes place with DIN high, the AD7714 returns to
this default state. Table V outlines the bit designations for the Communications Register.
Table V. Communications Register
Table VI. Register Selection
0/
DRDY
RS2
RS1
RS0
R/
W
CH2
CH1
CH0
0/
DRDY
For a write operation, a 0 must be written to this bit so that the write operation to the Communications Register
actually takes place. If a 1 is written to this bit, the part will not clock on to subsequent bits in the register. It will stay
at this bit location until a 0 is written to this bit. Once a 0 is written to this bit, the next 7 bits will be loaded to the
Communications Register. For a read operation, this bit provides the status of the
DRDY flag from the part. The
status of this bit is the same as the
DRDY output pin.
RS2–RS0
Register Selection Bits. RS2 is the MSB of the three selection bits. The three bits select to which one of eight on-chip
registers the next read or write operation takes place as shown in Table VI along with the register size.
RS2
RS1
RS0
Register
Register Size
0
Communications Register
8 Bits
0
1
Mode Register
8 Bits
0
1
0
Filter High Register
8 Bits
0
1
Filter Low Register
8 Bits
1
0
Test Register
8 Bits
1
0
1
Data Register
16 Bits or 24 Bits
1
0
Zero-Scale Calibration Register
24 Bits
1
Full-Scale Calibration Register
24 Bits
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