Data Sheet
AD7790
Rev. A | Page 17 of 20
CIRCUIT DESCRIPTION
ANALOG INPUT CHANNEL
The AD7790 has one differential analog input channel. This is
connected to the on-chip buffer amplifier when the device is
operated in buffered mode and directly to the modulator when
the device is operated in unbuffered mode. In buffered mode
(the BUF bit in the mode register is set to 1), the input channel
feeds into a high impedance input stage of the buffer amplifier.
Therefore, the input can tolerate significant source impedances
and is tailored for direct connection to external resistive-type
sensors such as strain gauges or resistance temperature detec-
tors (RTDs).
When BUF = 0, the part is operated in unbuffered mode.
This results in a higher analog input current. Note that this
unbuffered input path provides a dynamic load to the driving
source. Therefore, resistor/capacitor combinations on the
input pins can cause dc gain errors, depending on the output
impedance of the source that is driving the ADC input.
Table 16shows the allowable external resistance/capacitance values for
unbuffered mode such that no gain error at the 16-bit level is
introduced.
Table 16. External R-C Combination for No 16-Bit Gain Error
C (pF)
R (Ω)
50
22.8K
100
13.1K
500
3.3K
1000
1.8K
5000
360
The absolute input voltage range in buffered mode is restricted
to a range between GND + 100 mV and VDD – 100 mV. Care
must be taken in setting up the common-mode voltage so that
these limits are not exceeded. Otherwise, there will be degrada-
tion in linearity and noise performance.
The absolute input voltage in unbuffered mode includes the
range between GND – 30 mV and VDD + 30 mV as a result of
being unbuffered. The negative absolute input voltage limit does
allow the possibility of monitoring small true bipolar signals
with respect to GND.
PROGRAMMABLE GAIN AMPLIFIER
The output from the buffer on the ADC is applied to the input
of the on-chip programmable gain amplifier (PGA). The PGA
gain range is programmed via the gain bits G1 and G0 in the
mode register. With an external 2.5 V reference applied, the
PGA can be programmed to have a bipolar range of ±2.5 V,
±1.25 V, ±625 mV, or ±312.5 mV. These are the ranges that
should appear at the input to the on-chip PGA.
BIPOLAR CONFIGURATION
The analog input to the AD7790 accepts a bipolar input voltage
range. A bipolar input range does not imply that the part can
tolerate negative voltages with respect to system GND. Bipolar
signals on the AIN(+) input are referenced to the voltage on the
AIN(–) input. For example, if AIN(–) is 2.5 V and the ADC is
configured for a gain of 1, the analog input range on the AIN(+)
input is 0 V to 5 V.
DATA OUTPUT CODING
The output code is offset binary with a negative full-scale volt-
age resulting in a code of 000...000, a zero differential input
voltage resulting in a code of 100...000, and a positive full-scale
input voltage resulting in a code of 111...111. The output code
for any analog input voltage can be represented as
Code = 2N – 1 × [(AIN × GAIN/VREF) + 1]
where AIN is the analog input voltage, GAIN is the PGA gain,
and N = 16.
REFERENCE INPUT
The AD7790 has a fully differential input capability for the
channel. The common-mode range for these differential inputs
is from GND to VDD. The reference input is unbuffered and,
therefore, excessive R-C source impedances will introduce gain
errors. The reference voltage REFIN (REFIN(+) – REFIN(–)) is
2.5 V nominal for specified operation, but the AD7790 is func-
tional with reference voltages from 0.1 V to VDD. In applications
where the excitation (voltage or current) for the transducer on
the analog input also drives the reference voltage for the part,
the effect of the low frequency noise in the excitation source
will be removed because the application is ratiometric. If the
AD7790 is used in a nonratiometric application, a low noise
reference should be used.
Recommended 2.5 V reference voltage sources for the AD7790
include the ADR381 and ADR391 because these are low noise,
low power references. If the complete analog section is driven
from a 2.5 V power supply, the reference voltage source will
require some headroom. In this case, a 2.048 V reference such
as the ADR380 is recommended, again low noise, low power
references. Also note that the reference inputs provide a high
impedance, dynamic load. Because the input impedance of each
reference input is dynamic, resistor/capacitor combinations on
these inputs can cause dc gain errors, depending on the output
impedance of the source that is driving the reference inputs.
Reference voltage sources like those recommended above (e.g.,
ADR391) will typically have low output impedances and are,
therefore, tolerant to having decoupling capacitors on