參數(shù)資料
型號: AD7879-1ACPZ-500R7
廠商: Analog Devices Inc
文件頁數(shù): 23/41頁
文件大小: 0K
描述: IC ADC 12BIT CTRLR TOUCH 16LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 電阻
觸摸面板接口: 4 線
輸入數(shù)/鍵: 1 TSC
分辨率(位): 12 b
評估套件: 可供
數(shù)據(jù)接口: I²C,串行
數(shù)據(jù)速率/采樣率 (SPS,BPS): 105k
電壓基準(zhǔn): 內(nèi)部
電源電壓: 1.6 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-VQ
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 779 (CN2011-ZH PDF)
其它名稱: AD7879-1ACPZ-500R7DKR
AD7879/AD7889
Rev. C | Page 2 of 40
TABLE OF CONTENTS
REVISION HISTORY
11/10—Rev. B to Rev. C
Changes to Table 2............................................................................ 3
Added Conversion Timing Section.............................................. 20
Added Figure 34.............................................................................. 29
1/10—Rev. A to Rev. B
Updated Outline Dimensions ....................................................... 37
Changes to Ordering Guide .......................................................... 38
3/09—Rev. 0 to Rev. A
Added AD7889 and Backside-Coated WLCSP......... Throughout
Change to Battery Monitor, Input Voltage Range Parameter..... 3
Changes to Table 4............................................................................ 6
Added Thermal Resistance Section and Table 5;
Renumbered Sequentially................................................................ 6
Changes to Pin Configurations and Function Descriptions
Section................................................................................................ 7
Added Table 7.................................................................................... 8
Changes to First Method Section ................................................. 15
Changes to Median and Averaging Filters Section .................... 17
Changes to GPIO Interrupt Enable (Bit 12, Control Register 3,
Address 0x03) Section ................................................................... 19
Changes to Table 13 ....................................................................... 22
Changes to ADC Channel (Control Register 1, Bits[14:12])
Section.............................................................................................. 26
Changes to Power Management (Control Register 2,
Bits[15:14]) Section........................................................................ 27
Changes to DAV—Data Available Interrupt Section................. 29
Changes to INT—Out-of-Limit Interrupt Section .................... 29
Changes to Writing Data Section................................................. 31
Changes to Reading Data Section and Figure 40....................... 32
Changes to Figure 41...................................................................... 33
Changes to Writing Data over the I2C Bus Section.................... 34
Changes to Figure 44...................................................................... 35
Updated Outline Dimensions....................................................... 37
Changes to Ordering Guide.......................................................... 38
10/08—Revision 0: Initial Version
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