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參數(shù)資料
| 型號： | AD7879-1ACPZ-500R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT CTRLR TOUCH 16LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 12 b |
| 評估套件： | 可供 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 數(shù)據(jù)速率/采樣率 (SPS，BPS)： | 105k |
| 電壓基準(zhǔn)： | 內(nèi)部 |
| 電源電壓： | 1.6 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 779 (CN2011-ZH PDF) |
| 其它名稱： | AD7879-1ACPZ-500R7DKR |
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AD7879/AD7889
Rev. C | Page 32 of 40
SERIAL INTERFACE
The AD7879 and AD7879-1 (and the AD7889 and AD7889-1)
differ only in the serial interface provided on the part. The
AD7879 and the AD7889 are available with a serial peripheral
interface (SPI). The AD7879-1 and the AD7889-1 are available
with an I2C-compatible interface. It is recommended that
addresses outside the register map not be written to.
SPI INTERFACE
The AD7879/AD7889 have a 4-wire SPI. The SPI has a data
input pin (DIN) for inputting data to the device, a data output
pin (DOUT) for reading data back from the device, and a data
clock pin (SCL) for clocking data into and out of the device. A
chip select pin (CS) enables or disables the serial interface. CS is
required for correct operation of the SPI interface. Data is
clocked out of the AD7879/AD7889 on the falling edge of SCL,
and data is clocked into the device on the rising edge of SCL.
SPI Command Word
All data transactions on the SPI bus begin with the master
taking CS from high to low and sending out the command
word. This indicates to the AD7879/AD7889 whether the
transaction is a read or a write and gives the address of the
register from which to begin the data transfer. The bit map in
Table 24 shows the SPI command word.
Table 24. SPI Command Word
MSB
LSB
15
14
13
12
11
10
[9:0]
1
0
R/W
Register address
Bits[15:11] of the command word must be set to 11100 to
successfully begin a bus transaction.
Bit 10 is the read/write bit; 1 indicates a read, and 0 indicates
a write.
Bits[9:0] contain the target register address. When reading or
writing to more than one register, this address indicates the
address of the first register to be written to or read from.
Writing Data
Data is written to the AD7879/AD7889 in 16-bit words. The
first word written to the device is the command word, with the
read/write bit set to 0. The master then supplies the 16-bit input
data-word on the DIN line. The AD7879/AD7889 clock the
data into the register addressed in the command word. If there
is more than one word of data to be clocked in, the AD7879/
AD7889 automatically increment the address pointer and clock
the next data-word into the following register.
The AD7879/AD7889 continue to clock in data on the DIN line
until the master ends the write transition by pulling CS high or
until the address pointer reaches its maximum value. The AD7879/
AD7889 address pointer does not wrap. When the address
pointer reaches its maximum value, any data provided by the
master on the DIN line is ignored by the AD7879/AD7889.
NOTES
1. DATA BITS ARE LATCHED ON SCL RISING EDGES. SCL CAN IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 32 BITS MUST BE WRITTEN: 16 BITS FOR THE COMMAND WORD AND 16 BITS FOR DATA.
3. 16-BIT COMMAND WORD SETTINGS FOR SINGLE WRITE OPERATION:
CW[15:11] = 11100 (ENABLE WORD)
CW[10] = 0 (R/W)
CW[9:0] = [AD9, AD8, AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0] (10-BIT MSB JUSTIFIED REGISTER ADDRESS)
CW
11
CW
10
CW
13
CW
12
DIN
CW
15
CW
14
CW
9
CW
7
CW
6
CW
5
CW
4
CW
3
CW
2
CW
1
CW
0
D2
D1
D0
CW
8
t
4
t
8
16-BIT COMMAND WORD
16-BIT DATA
5
32
6
7
8
9
10
11
12
13
14
15
16
30
31
SCL
1
2
3
4
D15
D14
D13
17
18
19
CS
ENABLE WORD
R/W
REGISTER ADDRESS
07667-
038
t
2
t
1
t
3
t
5
Figure 39. Single Register Write, SPI Timing
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