I2C DATA READ To read data from the AD8153 registe" />
參數(shù)資料
型號(hào)： AD8153-EVALZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/24頁(yè)
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD8153
標(biāo)準(zhǔn)包裝： 1
系列： XStream™
主要目的： 接口，2:1 多路復(fù)用器
嵌入式： 否
已用 IC / 零件： AD8153
主要屬性： 單道 3.2Gbps 2:1 多路復(fù)用器/1:2 多路分解器開關(guān)
次要屬性： 16 ps 確定性抖動(dòng)，500 fs rms 隨機(jī)抖動(dòng)，通過(guò) USB 實(shí)現(xiàn) GUI
已供物品： 板，纜線，CD
產(chǎn)品目錄頁(yè)面： 801 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： AD8153ACPZ-RL7DKR-ND - IC SW MUX/DEMUX SGL BUFF 32LFCSP
AD8153ACPZ-RL7CT-ND - IC SW MUX/DEMUX SGL BUFF 32LFCSP
AD8153ACPZ-RL7TR-ND - IC SW MUX/DEMUX SGL BUFF 32LFCSP
AD8153ACPZ-ND - IC SW MUX/DEMUX SGL BUFF 32LFCSP
AD8153
Rev. 0 | Page 17 of 24
I2C DATA READ
To read data from the AD8153 register set, a microcontroller, or
any other I2C master, needs to send the appropriate control
signals to the AD8153 slave device. The steps to be followed are
listed below, where the signals are controlled by the I2C master
unless otherwise specified. A diagram of the procedure can be
seen in Figure 33.
1. Send a start condition (while holding the SCL line high, pull
the SDA line low).
2. Send the AD8153 part address (seven bits) whose upper
four bits are the static value b1001 and whose lower three
bits are controlled by the input pins I2C_ADDR[2:0]. This
transfer should be MSB first.
3. Send the write indicator bit (0).
4. Wait for the AD8153 to acknowledge the request.
5. Send the register address (eight bits) from which data is to
be read. This transfer should be MSB first. The register
address is kept in memory in the AD8153 until the part is
reset or the register address is written over with the same
procedure (Step 1 to Step 6).
6. Wait for the AD8153 to acknowledge the request.
7. Send a repeated start condition (while holding the SCL line
high, pull the SDA line low).
8. Send the AD8153 part address (seven bits) whose upper
four bits are the static value b1001 and whose lower three
bits are controlled by the input pins I2C_ADDR[1:0]. This
transfer should be MSB first.
9. Send the read indicator bit (1).
10. Wait for the AD8153 to acknowledge the request.
11. The AD8153 then serially transfers the data (eight bits) held
in the register indicated by the address set in Step 5.
12. Acknowledge the data.
13. Send a stop condition (while holding the SCL line high, pull
the SDA line high) and release control of the bus.
14. Send a repeated start condition (while holding the SCL line
high, pull the SDA line low) and continue with Step 2 of the
write procedure (see the I2C Data Write section) to perform
a write.
15. Send a repeated start condition (while holding the SCL line
high, pull the SDA line low) and continue with Step 2 of this
procedure to perform a read from another address.
16. Send a repeated start condition (while holding the SCL line
high, pull the SDA line low) and continue with Step 8 of this
procedure to perform a read from the same address.
The AD8153 read process is shown in Figure 33. The SCL signal
is shown along with a general read operation and a specific
example. In the example, Data 0x49 is read from Address 0x6D
of an AD8153 part with a part address of 0x4B. The part address is
seven bits wide and is composed of the AD8153 static upper
four bits (b1001) and the pin programmable lower three bits
(I2C_ADDR[2:0]). In this example, the I2C_ADDR bits are set
to b011. In Figure 33, the corresponding step number is visible
in the circle under the waveform. The SCL line is driven by the
I2C master and never by the AD8153 slave. As for the SDA line,
the data in the shaded polygons is driven by the AD8153,
whereas the data in the nonshaded polygons is driven by the I2C
master. The end phase case shown is that of 13a.
It is important to note that the SDA line only changes when the
SCL line is low, except for the case of sending a start, stop, or
repeated start condition, as in Step 1, Step 7, and Step 13. In
Figure 33, A is the same as ACK in Figure 32. Equally, Sr
represents a repeated start where the SDA line is brought high
before SCL is raised. SDA is then dropped while SCL is still high.
SCL
SDA
(GENERAL CASE)
SDA
(EXAMPLE)
START
FIXED PART
ADDR
[2:0]
R
W A
REGISTER ADDR
A
DATA
A
STOP
12
3
4
25
6
7
8
9
06
39
3-
00
5
10
11
12
13a
8
Sr
FIXED PART
ADDR
[2:0]
R
W A
Figure 33. I2C Read Diagram
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