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參數(shù)資料
| 型號(hào)： | AD824ARZ-14-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET R-R 2MHZ LP 14SOIC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 4 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| 增益帶寬積： | 2MHz |
| -3db帶寬： | 2MHz |
| 電流 - 輸入偏壓： | 4pA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 560µA |
| 電流 - 輸出 / 通道： | 12mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 30 V，±1.5 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 帶卷 (TR) |
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REV. C
AD824
–5–
WAFER TEST LIMITS
Parameter
Symbol
Conditions
Limit
Unit
Offset Voltage
VOS
1.0
mV max
Input Bias Current
IB
12
pA max
Input Offset Current
IOS
20
pA
Input Voltage Range
VCM
–0.2 to 3.0
V min
Common-Mode Rejection Ratio
CMRR
VCM = 0 V to 2 V
66
dB min
Power Supply Rejection Ratio
PSRR
V = + 2.7 V to +12 V
70
mV/V
Large Signal Voltage Gain
AVO
RL = 2 k
W
15
V/mV min
Output Voltage High
VOH
ISOURCE = 20
mA
4.975
V min
Output Voltage Low
VOL
ISINK = 20
mA25
mV max
Supply Current/Amplifier
ISY
VO = 0 V, RL =
600
mA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for
standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
(@ VS = 5.0 V, VCM = 0 V, TA = 25 C unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . –VS – 0.2 V to +VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .
±30 V
Output Short Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
R-14, R-16 Packages . . . . . . . . . . . . . . . . –65
∞C to +150∞C
Operating Temperature Range
AD824A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40
∞C to +85∞C
Junction Temperature Range
R-14, R-16 Packages . . . . . . . . . . . . . . . . –65
∞C to +150∞C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300
∞C
Package Type
qJA2
qJC
Unit
14-Lead SOIC (R)
120
36
∞C/W
16-Lead SOIC (R)
92
27
∞C/W
NOTES
1 Absolute maximum ratings apply to packaged parts unless otherwise noted.
2
qJA is specified for the worst case conditions, i.e., qJAis specified for device in socket
for P-DIP packages;
qJA is specified for device soldered in circuit board for SOIC
package.
ORDERING GUIDE
Temperature
Package
Model
Range
Description
Option
AD824AR-14
–40
∞C to +85∞C 14-Pin SOIC
R-14
AD824AR-14-3V
–40
∞C to +85∞C 14-Pin SOIC
R-14
AD824AR-16
–40
∞C to +85∞C 16-Pin SOIC
R-16
R1
R2
+IN
J1
J2
R13
–IN
R15
Q4
Q5
Q6
R9
I5
VCC
C3
Q7
C2
Q22
Q19
Q21 Q27
Q18
Q29
Q20
Q23
R7
C4
VOUT
Q24 Q25
Q31
Q28
R17
Q26
C1
I4
I3
I2
I1
R12
R14
Q2
Q8
Q3
VEE
I6
Figure 1. Simplified Schematic of 1/4 AD824
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD824 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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