參數(shù)資料
型號： AD8332ACPZ-R2
廠商： Analog Devices Inc
文件頁數(shù)： 19/56頁
文件大?。?/td> 0K
描述： IC AMP VGA PREAMP PROGR 32-LFCSP
標(biāo)準(zhǔn)包裝： 250
系列： X-AMP®
類型： 可變增益放大器
應(yīng)用： 信號處理
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ（5x5）
包裝： 帶卷 (TR)
配用： AD8332-EVALZ-ND - BOARD EVAL FOR AD8332
AD8331/AD8332/AD8334
Rev. G | Page 26 of 56
Active Impedance Matching
The LNA supports active impedance matching through an external
shunt feedback resistor from Pin LON to Pin INH. The input
resistance, RIN, is given in Equation 5, where A is the single-
ended gain of 4.5, and 6 kΩ is the unterminated input impedance.
IZ
IN
R
A
R
+
×
=
+
=
kΩ
33
kΩ
6
kΩ
6
1
(5)
CIZ is needed in series with RIZ because the dc levels at Pin LON
and Pin INH are unequal. Expressions for choosing RIZ in terms
of RIN and for choosing CIZ are found in the Applications
Information section. CSH and the ferrite bead enhance stability
at higher frequencies, where the loop gain is diminished, and
prevent peaking. Frequency response plots of the LNA are shown
in Figure 23 and Figure 24. The bandwidth is approximately
130 MHz for matched input impedances of 50 Ω to 200 Ω and
declines at higher source impedances. The unterminated
bandwidth (when RIZ = ∞) is approximately 80 MHz.
Each output can drive external loads as low as 100 Ω in addition
to the 100 Ω input impedance of the VGA (200 Ω differential).
Capacitive loading up to 10 pF is permissible. All loads should
be ac-coupled. Typically, Pin LOP output is used as a single-ended
driver for auxiliary circuits, such as those used for Doppler
ultrasound imaging. Pin LON drives RIZ. Alternatively, a
differential external circuit can be driven from the two outputs
in addition to the active feedback termination. In both cases,
important stability considerations discussed in the Applications
Information section should be carefully observed.
The impedance at each LNA output is 5 Ω. A 0.4 dB reduction
in open circuit gain results when driving the VGA, and a 0.8 dB
reduction results with an additional 100 Ω load at the output.
The differential gain of the LNA is 6 dB higher. If the load is less
than 200 Ω on either side, a compensating load is recommended
on the opposite output.
LNA Noise
The input-referred voltage noise sets an important limit on
system performance. The short-circuit input voltage noise of
the LNA is 0.74 nV/√Hz or 0.82 nV/√Hz (at maximum gain),
including the VGA noise. The open circuit, current noise is
2.5 pA/√Hz. These measurements, taken without a feedback
resistor, provide the basis for calculating the input noise and
noise figure performance of the configurations in Figure 75.
Figure 76 and Figure 77 show simulations extracted from these
results and the 4.1 dB noise figure (NF) measurement with the
input actively matched to a 50 Ω source. Unterminated (RIZ = ∞)
operation exhibits the lowest equivalent input noise and noise
figure. Figure 76 shows the noise figure vs. source resistance,
rising at low RS, where the LNA voltage noise is large compared
to the source noise, and again at high RS due to current noise.
The VGA input-referred voltage noise of 2.7 nV/√Hz is
included in all of the curves.
VOUT
UNTERMINATED
+
–
VIN
RIN
RS
VOUT
RESISTIVE TERMINATION
+
–
VIN
RIN
RS
VOUT
ACTIVE IMPEDANCE MATCH - RS = RIN
+
–
VIN
RIN
RIZ
1 + 4.5
RS
RIN =
03
19
9-
0
75
Figure 75. Input Configurations
7
6
5
4
3
2
1
0
50
100
1k
NO
IS
E
F
IG
UR
E
(
d
B)
RS ()
03
19
9-
0
76
INCLUDES NOISE OF VGA
RESISTIVE TERMINATION
(RS = RIN)
ACTIVE IMPEDANCE MATCH
UNTERMINATED
SIMULATION
Figure 76. Noise Figure vs. RS for Resistive,
Active Match, and Unterminated Inputs
7
6
5
4
3
2
1
0
50
100
1k
NO
IS
E
F
IG
UR
E
(
d
B)
RS ()
03
19
9-
0
77
INCLUDES NOISE OF VGA
RIN = 50
RIN = 75
RIN = 100
RIN = 200
RIZ = ∞
(SIMULATED RESULTS)
Figure 77. Noise Figure vs. RS for Various Fixed Values of RIN, Actively Matched
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